the scatter/gather TLB cannot be invalidated on these chips. So, to
work around this, we configure the otherwise unsed DMA Window 2 as a
2M SGMAP window at 128M, point all of its page table entries at the
DMA spill page, and, when the TLB is to be invalidated, put the PCI bus
into loopback mode, and create a target hit on Window 2 every 64k for
the number of TLB entries (plus a few ... it seems to not work unless
we read a few extra times), forcing out old TLB entries to make room for
the new, dummy target hits.
member to the DMA tag, and calling the direct-mapped back-ends directly,
rather than through chipset-specific front-ends which pass the window
base as an additional argument.
thorpej