235700 Commits

Author SHA1 Message Date
msaitoh
12506c1da0 Add support iNVM (integrated Non-Volatile Memory) for I21[01]. This change
fixes a bug that a MAC address is wrongly set on iNVM machines and NICs.
Tested with Shuttle DS57U(iNVM based) and other non iNVM based I210 machines.
2015-05-16 22:41:59 +00:00
joerg
884f5e5337 Hook up x86_64 assembler version for the Montgomery multiplication and
the GF routines. Put rsax glue in the right file.
2015-05-16 22:24:41 +00:00
joerg
d555156c33 Find CPU-specific variants of the long number routines. Regenerate. 2015-05-16 22:23:31 +00:00
jmcneill
df78cf4a7d Support transfers > 4-bytes long by reading and writing using the
controller's packet-based interface instead of non-packet ("normal") mode.
2015-05-16 21:31:39 +00:00
joerg
137a13ddd4 No need for SSE2 define. 2015-05-16 20:23:38 +00:00
joerg
ac3734b820 Use Bitsplice/Vector optimized AES too. 2015-05-16 20:23:06 +00:00
joerg
2ae6f4c2ca Use assembler implementation of Camellia on x86_64, switching a boost
for medium to large block sizes.
2015-05-16 20:22:15 +00:00
joerg
746ac10d4e Use x86_64 assembler version of whirlpool. It has a small but consistent
performance advantage over the clang output on my E3v2.
2015-05-16 19:33:59 +00:00
joerg
2000d7aac1 Use x86_64 assembler version of MD5. 2015-05-16 19:19:36 +00:00
joerg
a69ca7eeeb Use assembler version of SHA1. Can't use SHA2 version yet due to overlap
with libc.
2015-05-16 19:09:03 +00:00
joerg
477fb41998 Explicitly pass CC down. When building with clang, force external
assembler as some of the Perl scripts use -Wa,-v. Regenerate for AVX
support.
2015-05-16 19:08:37 +00:00
joerg
c70ac7a37b Optimize i386 support in libcrypto:
- Enable optional SSE2 assembler versions. Regenerate.
- Hook up assembler version of GCM.
2015-05-16 17:32:54 +00:00
joerg
74ab1f3972 Don't list gcm128.c twice. 2015-05-16 17:26:51 +00:00
joerg
0e3c72849d Use assembler routine for GCM modes on x86_64. 2015-05-16 17:26:00 +00:00
snj
0dc8c343da fix gimplish 2015-05-16 17:18:57 +00:00
snj
ad614bfa87 the OSI options are long gone (hi joerg!) 2015-05-16 17:13:55 +00:00
pooka
c67798ece2 Autogenerate /dev/ldNx nodes based on which units attached instead of
hardcoding some arbitrary value for N.
2015-05-16 15:03:12 +00:00
ozaki-r
9fbb6a243a Enable IPv6 negative tests
As ping6 timeout feature (-X option) is added, we can do negative
tests without wasting time.

1 sec delay is added after network setup to avoid false positives.
2015-05-16 14:29:37 +00:00
christos
3e03b3d393 Pass the correct length to match_patter_list; from Hanno Boeck.
XXX: pullup-7
2015-05-16 14:17:28 +00:00
pooka
61248571de Satisfy yet another non-modular driver still requiring a manual init call. 2015-05-16 13:59:00 +00:00
roy
f45d868787 Separate ARP handling DAD from inet.
This is done by signalling the intent to try tentative addresses
and then clearing the intent once the address is setup.
When the ARP handler is installed (arp_ifinit) then it adds
dad start and stop functions to the address which are used instead
of calling ARP directly.
2015-05-16 12:12:46 +00:00
jmcneill
3333c4c041 add ddc at iic3 (HDMI DDC) 2015-05-16 11:49:01 +00:00
kefren
56d130b58b Don't overexpose tcp_iss_secret and don't bother compute it unless
RFC1948 compliance is activated
2015-05-16 10:09:20 +00:00
msaitoh
ecf6737d54 regen. 2015-05-16 09:39:47 +00:00
msaitoh
45bd3bb8db Add some Intel Core 5G devices and Realtek RTL8188EE. 2015-05-16 09:39:22 +00:00
nonaka
1d659cfa1d should be able to use 5GHz wireless network. 2015-05-16 07:58:19 +00:00
skrll
930f1887e6 Add MULTIPROCESSOR tlb flushes to armv7_tlb_flushID. Also, invalidate the
branch predictor.

This function is only used by db_write_bytes and kobj_machdep
2015-05-16 07:22:37 +00:00
matt
cac6d59cc3 Use :Q instead of " to quote make vars DBG and LDSTATIC 2015-05-16 02:33:12 +00:00
kefren
a6fab82126 Don't put segment on the wire if security request can't be fulfilled 2015-05-16 01:15:34 +00:00
joerg
73311a5466 Don't pre-compute string sizes in a relatively cold function. 2015-05-15 18:28:36 +00:00
kefren
110f4b05db Don't try to do PCB lookup for bad checksummed segments
Fixes PR/43510 and PR/48452
2015-05-15 18:03:45 +00:00
jmcneill
b6cb6e0638 Tegra SATA registers 2015-05-15 17:43:35 +00:00
joerg
d8b0a2809a Drop conditional support for writing large numbers as hex. 2015-05-15 16:25:50 +00:00
joerg
8f2555d84b Remove conditionals for NetBSD before 4.0. 2015-05-15 16:24:30 +00:00
joerg
5d88ea0bae Don't create a weak alias in the !RUMPACTION case. 2015-05-15 14:26:02 +00:00
jmcneill
5cdbd765d2 enable SATA, maybe it will inspire someone to fix it 2015-05-15 12:18:48 +00:00
jmcneill
b43705e146 more Tegra SATA init 2015-05-15 11:50:30 +00:00
jmcneill
27610eb34b enable XUSB PADCTL 2015-05-15 11:49:58 +00:00
jmcneill
cb241d9174 Tegra XUSB PADCTL driver 2015-05-15 11:49:10 +00:00
skrll
c60165d82a Make sure TLB is invalidated and ACTLR.SMP is set on ARM A15. ACTLR.SMP
enables the processor to receive instruction cache, BTB and TLB main-
tenance operations from other processors
2015-05-15 10:57:55 +00:00
ozaki-r
4b2e293fbb Add missing rump flag to net/route test files 2015-05-15 10:53:58 +00:00
msaitoh
d35fd4d212 Print operable voltage with aprint_verbose(). OK'ed by pgoyette@. 2015-05-15 08:44:24 +00:00
knakahara
5613b8fb8b if_iwm use unified establish API. 2015-05-15 08:44:15 +00:00
knakahara
d12e1568ea update man. 2015-05-15 08:39:14 +00:00
knakahara
117a6cdd67 pci_msi_string() must be used by MD code only. 2015-05-15 08:36:41 +00:00
knakahara
6d12998d34 refactor: change function names and move them. 2015-05-15 08:29:33 +00:00
knakahara
f945a2f765 unify INTx, MSI and MSI-X APIs without alloc. (alloc API is under discussion) 2015-05-15 08:26:44 +00:00
martin
abb0534607 Enable ktrace by default 2015-05-15 08:19:48 +00:00
kefren
0c4c07ab30 Add options -X for deadline and -x for reply maxwait (flag names matching
FreeBSD). Unline FreeBSD, currently -x doesn't count late packets to statistics.
After discussion with, and help from ozaki-r@
Should fix PR/49896
2015-05-15 08:02:39 +00:00
msaitoh
9bfe97f79b Fix typo in comment. 2015-05-15 07:59:00 +00:00