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2163 Commits

Author SHA1 Message Date
matt
d303a3d4ea Add ESDHC DCR definitions 2012-07-26 18:41:32 +00:00
matt
5f7ac26a52 When using DMA, make sure to initialize SNOOPing. 2012-07-26 18:38:10 +00:00
matt
95b282e26a When dealing with kernel invalidations, make sure to use context-synchronizing 
instructions.
 2012-07-25 22:11:36 +00:00
matt
4923f4a4ee Add support for PPC FP emulation to BookE. 
Pass a ksiginfo_t to fpu_emulation so it can give more detailed
info on signals.
 2012-07-23 04:13:06 +00:00
matt
20d6accb8c Split mdio/mii access into its own "device" and update accordingly. 
(on the P1025 the mdio functionality is separate from the etsec functions).
Provide locking for mii access.
 2012-07-22 23:46:10 +00:00
matt
0bc3200029 Fix mii_statchg to take a 'struct ifnet *' instead of device_t. This fixes 
problem with a common MDIO bus used for multiple interfaces.
Some drivers converted to CFATTACL_DECL_NEW.
 2012-07-22 14:32:49 +00:00
matt
6772433ece Use the new syscall approach by collapsing fancy/plain variants into just 
a single routine.
 2012-07-20 14:21:20 +00:00
matt
09fca0b71e EHCI_USBINTR is 4 bytes long so use EOWRITE4 2012-07-20 02:14:01 +00:00
matt
a162208b2f Add some more PVRs and SVRs 2012-07-18 20:46:36 +00:00
matt
c988344e70 Add P1025 support to the PCI truth tables. 
P1025 only has two PCIe ports, not 3.
 2012-07-18 19:38:26 +00:00
matt
007ee40a0b Map NOR as PREFETCHABLE. 2012-07-18 19:01:50 +00:00
matt
6b4d304eba These are not used so nuke 'em. 2012-07-18 18:55:27 +00:00
matt
96ce70db80 If allocating lots of VA space for an io device, try to 'reserve' the space 
so that the TLB might be able to create a large TLB entry to map it all.
 2012-07-18 18:51:59 +00:00
matt
1d4f8f38c8 Don't assume 1:1 PA:VA mapping 2012-07-18 18:50:46 +00:00
matt
ab37920fbd Fix some SHIFTOUT to SHIFTIN 
Add a lookup of tlb1 by pa.  fix comparisions of xtlb entries by using
masks.  (since xtlb can looked up by pa & va and va may not equal pa).
 2012-07-18 18:29:22 +00:00
matt
bff822726f Fix some boundary conditions (fence post errors). 2012-07-18 17:41:59 +00:00
matt
820d02966d Add conditionals so this should work for the MPC8XX SoCs. 
Turn on PSL_RI in interrupts.
 2012-07-18 16:56:51 +00:00
matt
33845ad825 Add two missing interrupt sources for P1025. 2012-07-18 16:45:33 +00:00
matt
0803c20a9e Define the MPC8XX traps 2012-07-18 16:44:52 +00:00
matt
c53bebd619 MPC8xx SPR defintions 2012-07-17 20:46:07 +00:00
jmmv
9a0b3bbafc OF_finddevice returns -1 on error, not an arbitrary negative number. Make 
conditional explicit so that model_name gets a chance to be initialized when
the handle for the device is actually negative (which appears to be the case
in my Mac Mini G4).
 2012-07-17 03:13:31 +00:00
matt
20c73c17d6 The ETSEC on the P1025 has been moved/split so the MDIO stayed in the same 
place but each ETSEC has been split into two virtual halves (G0 and G1) and
each one has a new different base address.
For some reason, tsec1 connects to phy 2 and tsec2 connects to phy 1.
Adjust config file to match
 2012-07-17 01:36:12 +00:00
matt
a8a82a563c Add support for the Freescale TWR-P1025 evaluation board and the P1025/P1016 
QorIQ processors.  XXX tsec isn't working yet on the TWR-P1025.
 2012-07-15 08:44:56 +00:00
matt
789d060691 Add some e500mc/e5500 machines. 2012-07-09 17:58:34 +00:00
matt
dd01d67e95 Allow the use of the full 4GB address space. 2012-07-09 17:55:15 +00:00
matt
d2df93c65d Use pmap_segtab_t 2012-07-09 17:48:31 +00:00
matt
7f99503816 More cleanup. Use a union (pmap_segtab) and a typedef (pmap_segtab_t). Add 
more functionality from the mips pmap and try to make it more common to ease
the transition for mips in the future.
 2012-07-09 17:45:22 +00:00
matt
cc09c43882 Add hook so E500 watchdog can use a separate stack but leave it disabled by 
default.
 2012-07-09 17:36:55 +00:00
matt
4900712601 If we paniced because a watchdog timed out, PSL_CE will be clear. So don't 
assert PSL_CE is set if panicstr is not NULL.
 2012-07-09 11:40:19 +00:00
matt
f396289e32 s/seg_tab/seg_ptr/ 2012-07-05 17:25:36 +00:00
kiyohara
df7c9c90af Don't call extent_free() in memio_unmap(), if not call extent_alloc() with 
defined PPC_IBM4XX and extent_flags.
 2012-07-05 03:02:53 +00:00
matt
f892497c8e Don't panic if you can't allocate a contiguous stack for system threads. 
Just use a mapped a stack.
 2012-06-28 15:28:44 +00:00
kiyohara
41f4d38cf3 Flush current empty descriptor in emac_rxeob_intr(). 2012-06-24 08:39:39 +00:00
matt
e7841c4a22 Compute softintr mask correctly. 2012-06-08 23:35:23 +00:00
macallan
aec4f24986 fix same thinko as in previous commit, in have_pending_intr_p() 2012-06-07 04:37:09 +00:00
macallan
3add50773b look at the right cpu_softints bits in pic_do_pending_int() 
so we call the right softint handlers
 2012-06-07 02:39:22 +00:00
matt
283eda5a32 Add __HAVE_RAS support. Do it in userret. 2012-05-26 00:31:07 +00:00
macallan
703675e11d copy properties for valkyriefb as well 2012-05-24 00:40:11 +00:00
martin
6c3cc552c2 Calling _lwp_create() with a bogus ucontext could trigger a kernel 
assertion failure (and thus a crash in DIAGNOSTIC kernels). Independently
discovered by YAMAMOTO Takashi and Joel Sing.

To avoid this, introduce a cpu_mcontext_validate() function and move all
sanity checks from cpu_setmcontext() there. Also untangle the netbsd32
compat mess slightly and add a cpu_mcontext32_validate() cousin there.

Add an exhaustive atf test case, based partly on code from Joel Sing.

Should finally fix the remaining open part of PR kern/43903.
 2012-05-21 14:15:16 +00:00
matt
f1963da42f Fix SPE loading typo as described in PR/45731 2012-05-20 06:17:28 +00:00
kiyohara
24aaa6bc71 prep's boot supports to load kernel from HDD. We can specify option -I 
(no in-kernel).
 2012-05-19 14:47:37 +00:00
matt
0dfd46e973 Fix a few compile problems on non-P2020 platforms. 2012-05-19 00:11:46 +00:00
matt
396f225953 The P2020 doesn't have GPIO in the same place as othe 85xx. Deal with it. 2012-05-17 16:24:09 +00:00
matt
62dd40e661 Allow user addresses >= 0x80000000 2012-05-17 16:22:38 +00:00
matt
94a2d5c844 Add an KASSERT to check that PSL_PR is always set. 2012-05-17 16:21:45 +00:00
macallan
8b2ecf848a provide a BAT mapping for the PCI IO range on Grackle/Heathrow based macs 
now drivers that need PCI IO access work again
 2012-05-08 05:15:45 +00:00
matt
12ca21c5bb Preserve some MACCFG2 bits 2012-05-07 23:04:22 +00:00
matt
ca66ac7ad4 Don't use the current value of maccfg2. 2012-04-20 13:51:48 +00:00
matt
f90c9c2dab Read maccfg1/maccfg2/ecntrl so we can preserve bits we don't change (like 
GMII mode).
 2012-04-19 21:32:01 +00:00
matt
1f81b2fdc7 Don't use global asm for __clang__ 2012-04-10 16:57:50 +00:00