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d1e515ad53
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121599 Commits

Author SHA1 Message Date
martin
d1e515ad53 Add missing prototypes 2014-02-24 07:50:22 +00:00
martin
622b3e3478 Remove unused variables 2014-02-24 07:46:33 +00:00
martin
5bfa93ffc5 Fix missing prototypes/includes. 2014-02-24 07:41:15 +00:00
skrll
6d3ceb1d61 Rename NetBSD/hp700 to NetBSD/hppa. 
Unfortunately our VCS isn't very helpful here.
 2014-02-24 07:23:38 +00:00
matt
cab94bd246 Don't need to round since values are N-1. 2014-02-24 00:49:53 +00:00
msaitoh
e8149d13fe Remove unused variable. Fixes compile error. 2014-02-24 00:32:17 +00:00
dsl
a1bc28e807 Rename (the recently added) 'x86_xsave_size' to 'x86_fpu_save_size' 
and default to 512 (the size of the fxsave structure).
 2014-02-23 22:38:40 +00:00
dsl
de8f31be61 Avoid unnecessary (and pointless) references to pcb->pcb_savefpu. 
They were all in asserts.
 2014-02-23 22:36:43 +00:00
dsl
21ead8e9af Add fpu_set_default_cw() and use it in the emulations to set the default 
x87 control word.
This means that nothing outside fpu.c cares about the internals of the
  fpu save area.
New kernel modules won't load with the old kernel - but that won't matter.
 2014-02-23 22:35:27 +00:00
matt
0488272916 #include <arm/locore.h> 2014-02-23 21:19:06 +00:00
martin
8dd2c2e15c fix typo 2014-02-23 20:56:29 +00:00
njoly
229908f488 Use Aux32Info not AuxInfo. Noticed by Maxime Villard. 2014-02-23 16:07:40 +00:00
christos
dabffed6fd use aprint. 2014-02-23 15:29:11 +00:00
skrll
eaf4153f13 Update a comment 2014-02-23 13:22:32 +00:00
skrll
62fa02fd10 Bump MD size. Verified working. 2014-02-23 13:15:12 +00:00
dsl
f9cd6e68d1 Determine whether the cpu supports xsave (and hence AVX). 
The result is only written to sysctl nodes at the moment.
I see:
machdep.fpu_save = 3 (implies xsaveopt)
machdep.xsave_size = 832
machdep.xsave_features = 7
Completely common up the i386 and amd64 machdep sysctl creation.
 2014-02-23 12:56:40 +00:00
njoly
a310936659 Use cprng_strong32 for LINUX_AT_RANDOM on amd64 too. 2014-02-23 12:01:51 +00:00
njoly
6e5d6d35f1 Fix wrong KASSERTs. Do not compare size vs. entries count. 2014-02-23 11:09:42 +00:00
martin
575b76f8d7 Fix obvious typo 2014-02-23 08:07:33 +00:00
mlelstv
5d1221e5bf ttioctl always gets a valid lwp reference. Replace attempt to handle a NULL 
reference in only one place with a regular assertion.
 2014-02-23 07:54:43 +00:00
martin
2c07e7980c Provide a prototype for xputchar 2014-02-23 07:49:04 +00:00
matt
b2cdde2ce0 Add way_size to arm_cache_info 
Fix arm67_tlb_purge prototype
 2014-02-22 20:50:46 +00:00
matt
1999199781 Add L1_TABLE_SIZE_REAL 2014-02-22 20:46:35 +00:00
matt
5803417a10 Don't manipulate the pte to get uncached memory, use PMAP_NOCACHE instead. 
Convert footbring to kenter_pa/kremove
 2014-02-22 20:33:00 +00:00
matt
9e762b54d5 Trim include files 2014-02-22 19:16:06 +00:00
mlelstv
509b7e4910 Drop empty priority lists, not the full ones. Fixes kern/48611. 2014-02-22 19:05:31 +00:00
matt
7469d28fa0 Deal with non-4KB page sizes 2014-02-22 19:03:06 +00:00
matt
53872253af include <arm/locore.h> 2014-02-22 18:56:25 +00:00
matt
13df20be52 Deal with non-4K page sizes. 2014-02-22 18:55:53 +00:00
matt
723d94f9f2 use kenter_pa/kremove 2014-02-22 18:55:18 +00:00
martin
25a68bc40b Allow kernels without tsciic to build. 2014-02-22 18:42:47 +00:00
dsl
fc194a52bb Re-use the unused ci_cpu_serial[3] to save the highest cpuid values 
for the normal and extended leafs.
(The 'normal' one might be luring in the global cpulevel.)
Read the 'extended feature' from cpuid.80000001.%ecx/edx into
    ci_feat_val[3/2] just after saving cpuid.1.%ecx/dx in ci_feat_val[1/0]
    instead of doing it separately for amd k678 and via c3 processors
    in their probe functions and repeating it for all cpus a few instructions
    later when x86_cpu_topology() is called.
x86_cpu_topology() is only called from cpu_probe() and really doesn't
  deserve its own source file. Chasing the setup code is bad enough anyway.
 2014-02-22 17:48:08 +00:00
martin
49de48ba03 Explicitly include armreg.h (for the interrupt enable bit) 2014-02-22 16:14:38 +00:00
matt
6b03678558 Define __HAVE_ATOMIC64_OPS if EABI && ARMv6 or later. 2014-02-22 08:02:28 +00:00
maxv
33cfa4fef0 Simplify error path. 
ok christos@
 2014-02-22 07:53:16 +00:00
matt
84691a419e Match *INSTALL* (so we can match *INSTALL.MP) 2014-02-21 22:33:08 +00:00
matt
d1eabf3d33 Rearrange KERNEL_BASE_PHYS 2014-02-21 22:31:58 +00:00
matt
ef9e661b7b Rework PIC method to be simplier. Change be more cortex neutral. 2014-02-21 22:22:48 +00:00
matt
ced22eb961 Add EMAC and CPUCFG registers 2014-02-21 22:18:47 +00:00
skrll
0785dcba86 Remove unnecessary struct simplelock forward declaration. 2014-02-21 22:08:07 +00:00
skrll
fbc004dd11 Remove struct simplelock forward declaration. 2014-02-21 22:06:48 +00:00
skrll
481e98f13b Remove unnecessary include of sys/simplelock.h 2014-02-21 22:05:58 +00:00
joerg
4d7f1b16bf Use code model small for LLVM, it should be equivalent to GCC's medlow. 2014-02-21 20:45:12 +00:00
palle
4ad8530004 sun4v: Rename TLB_ defines to SUN4U_TLB_ so entries created using TSB_DATA() are properly setup for sun4u and sun4v. Relocate the cputyp variable from autoconf.c to locore.s and make it const in param.h so optimized code can be generated. Parts from OpenBSD. Optimization suggested by nakayama@. OK martin@, mrg@, nakayama@ 2014-02-21 18:00:09 +00:00
skrll
bb7a6c8038 No need to include sys/simplelock.h here. 2014-02-21 16:08:19 +00:00
martin
74c216e103 Declare 16 and 8 bit atomic CAS - while it is not usually sane to expect 
these functions to work in MI code, we need them to provide some of the
__sync_* functions gcc and other compilers expect nowadays on some
architectures.
 2014-02-21 15:52:53 +00:00
jdc
ad1bbf54eb Add tsciic (alpha MI). 2014-02-21 12:24:52 +00:00
jdc
ad145e06bc Add tsciic and more (commented out) DS20L i2c devices. 2014-02-21 12:24:31 +00:00
jdc
5c7ee0a0a0 Add tsciic, a driver for the DECchip 21272 Core Logic chipset I2C controller. 
Tested on DS20L.
 2014-02-21 12:23:30 +00:00
skrll
d44a8024fa Fix typo in fix for PR/48606 2014-02-21 08:33:51 +00:00