Commit Graph

104 Commits

Author SHA1 Message Date
thorpej 71404bb533 Don't include <sys/map.h>. 2002-09-25 22:21:01 +00:00
chs 5a93abd050 fix the FIRMWORKSBUGS case: ofwr_init() substitutes a wrapper OFW entry point
for the real one, so we must call it before we save off the entry point
that the higher level code will use.
2002-09-16 02:07:24 +00:00
matt 05980fc1da Move bufpages to top of kernel vm space. allocate dead zone after buf
pages so that it go larger than > 256MB.
2002-08-28 06:27:20 +00:00
thorpej 139cdc3125 Make nbuf, nswbuf, and bufpages unsigned. Make all operations on these
variables unsigned, and update places where their values are printed.
2002-08-25 20:21:33 +00:00
matt ffdea2c266 Only do the dssall if cpu_altivec is set. 2002-08-23 16:08:10 +00:00
scw a0d58bf2f5 Remove an extra trailing bracket in a DEBUG printf. 2002-08-23 11:59:40 +00:00
matt 510b31be28 Add missing PMAPCOUNT2 macro for the non-PMAPCOUNTERS case 2002-08-22 15:43:08 +00:00
matt 9e33535006 Add more evcnt entries for monitoring the page table entries. 2002-08-21 18:36:55 +00:00
matt 8a75cdd09b Add evcnt's for common pmap activities when PMAPCOUNTERS is defined
in the config file.
2002-08-18 19:18:33 +00:00
matt 7f8f67eaed Re-enable PTE_EXEC. PTE_EXEC is now also cleared in pmap_zero_page,
pmap_copy_page, and pmap_clear_modify (pmap_clear_bit).  Remove #ifdef
MULTIPROCESSOR since the cache instructions operate on all caches on
all processors.
2002-08-14 14:25:15 +00:00
matt e66a17771e Disable PTE_EXEC optimization until I figure out why it fails on 750 but
not 74xx.
2002-08-07 19:04:05 +00:00
chs f73abf90fb on MP systems, if the firmware didn't configure the L2 cache
on the non-boot CPUs, copy the L2CR configuration from the boot CPU.
also, fix the code that configures the L2 cache so that it works at all.
while I'm here, use mfspr() and mtspr() instead of inline asms.
2002-08-06 06:20:08 +00:00
chs 301f1ebf31 move more inlines to cpu.h: mftb(), mftbl() and mfpvr().
(the mftb() in pmap.c only wanted the lower 32 bits, so that's now mftbl()).
2002-08-06 06:14:33 +00:00
chs 810cde53cc use a completely separate trap handler for syscall traps.
this reduces syscall overhead by 10% to 20% depending on cpu type.
2002-08-02 03:46:42 +00:00
chs fccc379b30 restructure the FPU and AltiVEC code so that it works for MP. 2002-07-28 07:07:44 +00:00
chs badae2dc11 disable the PTE_EXEC optimization for MP for now.
PTE_EXEC needs to become a per-CPU flag eventually.
2002-07-28 07:03:47 +00:00
chs 9b01e8d8ce split off the part of cpu_attach_common() that pokes at special CPU registers
into a separate function so that we can run it on each CPU we configure
rather than always on the boot CPU.
2002-07-28 07:03:15 +00:00
matt f9be6bb495 Cleanup AltiVec data stream issues with context switching. Don't stop
data streams on execptions/interrupts since the processor will suspend
them for us.  Only stop them on 1) process exit, 2) another process gets
its address space loaded, and 3) (for completeness only) we save a process's
AltiVec context.
2002-07-25 23:46:47 +00:00
matt a660a9325f Set normal memory PTEs with PTE_M (memory coherent). Change how we
remember the "exec"ness of a page.  If a managed page is pmap_enter'ed
with VM_PROT_EXECUTE, remember that it's an "exec"page.  Such that when
additional mapping are performed, no synch'ing of the I-cache is needed.
Revoke "exec"ness when the page is mapped into the kernel with VM_PROT_WRITE
or the pmap_page_protect is called with VM_PROT_NONE.
2002-07-25 23:33:04 +00:00
chs 4e9f286b98 for MP builds, save and restore sprg0 (which contains the curcpu pointer)
around restoring OFW's sprg registers while calling into OFW.
2002-07-24 06:04:43 +00:00
chs 185a5bbcf0 rename the intr_depth field of struct intrframe to avoid a name conflict
in MULTIPROCESSOR builds.
2002-07-24 05:44:37 +00:00
matt cde20d8743 Make sure that pmap_zero_page and pmap_copy_page don't make calls or
reference while relocation is disabled since the stack will be inaccessible.
Add support for using AltiVec in pmap_zero_page and pmap_copy_page on
AltiVec capable processors.
2002-07-18 22:51:57 +00:00
matt 436f257283 Add a common file to do pmap_zero_page/pmap_copy_page/pmap_pageidlezero and
pmap_syncicache.  This file uses a ppc feature in a sick and twisted way
to avoid mapping the physical pages used by those routines.  It performs
the operations with the MMU disabled but PPC exception save and retstore
the machine state and are invoked with the MMU disabled, this doesn't have
an adverse effect on the system.

Currently only enable for MPC6xx and !OLDPMAP.
2002-07-17 03:11:07 +00:00
matt ece8b74130 Add machdep.powerpc sysctl. Change the default value of powersave to -1
(< 0 mean no powersave available).  Enable powersave by default for
750/7400/7410 but leave if off for 7450/7455.
2002-07-16 23:04:20 +00:00
matt 3dc1994d70 Don't install extintr handler if not supplied.
Make panic message more informative.
2002-07-16 16:39:12 +00:00
matt 7c3dbdc01d When allocate VA for the msgbuf, don't allocate pages too since we have
already done that in pmap_bootstrap.  (fixes a small page leak at startup).
2002-07-09 19:05:00 +00:00
matt 140a273f7a Use lvewx/stvewx for VSCR and save ourselves 12 bytes we don't need to load. 2002-07-07 00:46:20 +00:00
dbj 397ff5c82a protect Debugger() call with ifdef DDB 2002-07-07 00:43:11 +00:00
matt 263c3cd253 Merge macppc/ofppc locore OFW code and move it here. 2002-07-06 18:01:23 +00:00
matt 685778b53b Peform a rototill over the powerpc-based ports.
Move the trap/vector initialization for MPC6xx ports to mpc6xx_machdep.c
Also move softnet, install_extintr, mapiodev, kvtop.  Add common BAT
initialization code.

Add user Altivec support.

Fix calls to OF_call_method in macppc/macppc/machdep.c.

Use ci_fpuproc in cpu_info instead of separate fpuproc.

Add separate syscall.c and defined __HAVE_SYSCALL_INTERN.
2002-07-05 18:45:15 +00:00
matt 25036f6b2d Properly compensate for rounding the start of a mem_region up. 2002-07-03 20:41:20 +00:00
matt af8dc59949 Add AltiVec routines for save_vec/enable_vec/init_vec. 2002-07-02 15:22:47 +00:00
matt 3043c05326 Add common routines to do BAT initialization, trap vector setup,
interrupt vector installation, VM initialization, core-dumps (stubbed),
and network soft interrupts.  Also kvtop and mapiodev.
2002-06-28 02:32:16 +00:00
matt 7c77963b01 Set SR_PRKEY for user pmaps. For the kernel SR(s) set SR_SUKEY|SR_PRKEY.
Note that we never use a PTE PP of 0 or 1 (supervisor protection) so the
"key" is basically unused.  However, use SR_PRKEY for user space is
conceptionally the right thing to do.  Currently the kernel_pmap SR(s) are
ignored but that is going to be fixed shortly.
2002-06-26 01:10:20 +00:00
briggs 31d3b62eff Pick up support for a few more things for the IBM750FX: l2cache
configuration and temperature sensor support, for example.
2002-06-21 01:38:57 +00:00
matt 365f1d6150 Add support for IBM750FX (used in latest iBooks). 2002-06-21 00:01:53 +00:00
briggs 029a7e8e9a - The 8240 and 8245 have a 603 core -- add them to the 603 lists...
- Use atop(dcache_size / assoc) for uvm_page_recolor(ing) instead
  of  atop(dcache_line_size / assoc).
2002-06-19 17:43:30 +00:00
wrstuden 2eb3dc82d8 Fix recent bugs seen on Performa 4400 macppc's by
Makoto Fujiwara <makoto@ki.nu> and Manuel Bouyer <bouyer@netbsd.org>.
Help from Allen Briggs, Jason Thorpe, and Matt Thomas.

We need to call cpu_cache_probe() early in boot (machdep.c).
Add 603 info for completeness, and use NBPG not PAGESIZE, as the
latter relies on uvm being setup (cpu_subr.c).
Let uvm_page_recolor() be called before uvm has been set up; just
note the page coloring value (uvm_page.c).
2002-06-19 17:01:18 +00:00
matt c937154e18 Add a missing return; after print the 745x cache size(s). 2002-06-17 21:28:48 +00:00
kleink dd6cccb3f2 Add a case label for the 603ev cache (identical to 603e). 2002-06-11 22:24:35 +00:00
scw 9f2155138c Fix a botched pmap_vsid_bitmap[] index.
I'm surprised this worked as long as it did.
2002-06-05 15:55:51 +00:00
lukem 06de426449 SIMPLEQ rototill:
- implement SIMPLEQ_REMOVE(head, elm, type, field).  whilst it's O(n),
  this mirrors the functionality of SLIST_REMOVE() (the other
  singly-linked list type) and FreeBSD's STAILQ_REMOVE()
- remove the unnecessary elm arg from SIMPLEQ_REMOVE_HEAD().
  this mirrors the functionality of SLIST_REMOVE_HEAD() (the other
  singly-linked list type) and FreeBSD's STAILQ_REMOVE_HEAD()
- remove notes about SIMPLEQ not supporting arbitrary element removal
- use SIMPLEQ_FOREACH() instead of home-grown for loops
- use SIMPLEQ_EMPTY() appropriately
- use SIMPLEQ_*() instead of accessing sqh_first,sqh_last,sqe_next directly
- reorder manual page; be consistent about how the types are listed
- other minor cleanups
2002-06-01 23:50:52 +00:00
kleink 0bf753ef67 Cosmetics: there are exceptions to the PVR major/minor rule. 2002-05-31 20:10:45 +00:00
kleink 46b946bc5f Fill in real cache size/organization information and recolor; currently
doesn't make a difference except for the 604e.

XXX Does not consider L2 caches yet.
2002-05-31 15:04:14 +00:00
augustss 7202dc2f30 Add CPU_CI symbol so that bzero.S actually compiles on ports other than walnut. 2002-05-19 18:56:54 +00:00
kleink 3626919f4c Oops, swapped mtsrin operands in previous. 2002-04-23 17:14:45 +00:00
kleink 3a03930d13 Add a third argument to pmap_bootstrap() which platform-specific
initialization can use to specify additional segment registers to be set
up in the kernel pmap.
2002-04-23 12:41:04 +00:00
kleink 884898e332 Convert the spill stack frame to use symbolic offset names; inspired by
a conversation with Matt Thomas.
2002-04-21 22:05:45 +00:00
kleink a641861ab8 Rig pmap_print_mmuregs() for the 601. 2002-04-19 20:56:56 +00:00
matt 66c475ca19 Use a common genassym.cf for all the PPC_MPC6XX ports. Add a makeoptions to
std.foo to indicate the directory to get genassym.cf from.  Add an intrframe
to <powerpc/frame.h> and make trap_subr.S use symbolic offsets into it.
2002-04-18 20:08:05 +00:00