Commit Graph

137 Commits

Author SHA1 Message Date
tsutsui 8303e98e40 Fix typo (s/req/reg/). 2001-01-05 19:08:04 +00:00
aymeric 6a808ce8c8 Initialize VIA Technologies' 82C686's ICU as if it were a 82C586.
This fixes interrupt allocation problems on modern Compaq laptops.
2001-01-05 18:39:12 +00:00
sommerfeld 851de295eb Change pci_intr_map to get interrupt source information from a "struct
pci_attach_args *" instead of from four separate parameters which in
all cases were extracted from the same "struct pci_attach_args".

This both simplifies the driver api, and allows for alternate PCI
interrupt mapping schemes, such as one using the tables described in
the Intel Multiprocessor Spec which describe interrupt wirings for
devices behind pci-pci bridges based on the device's location rather
the bridge's location.

Tested on alpha and i386; welcome to 1.5Q
2000-12-28 22:59:06 +00:00
enami 58f16f5f39 - Zero is a valid random data. Don't give up to attach.
- 4 cycle is enough to get 4 octet of data.
2000-12-21 02:43:04 +00:00
augustss a00e309252 Fix speeling in cooment. 2000-11-06 22:10:03 +00:00
augustss 83bdca3a71 Print a newline after the random number speed message. 2000-11-06 22:01:31 +00:00
ad 3d193b190b - Pequr -> Serverworks. It pays to do a cvs update first...
- Pay attention only to the low byte of config reg 0x44 on Serverworks chips,
  as Linux does.
- Compress duplicatated code.
2000-11-03 17:28:02 +00:00
thorpej 10203d4eca Change the RNG callout -- don't spin until data is available. If
none is available, just wait until the next clock tick.
2000-10-30 00:26:04 +00:00
simonb bb33bb331d Fix NRND == 0 case (unused variable). 2000-10-28 13:30:35 +00:00
itojun 5bbd7d495e fix busy-wait logic against random number register. (missing semicolon) 2000-10-28 04:58:35 +00:00
thorpej 3c01d4cbca Add support for sampling the random number generator on
the 810, 815, 820, and 840 chipsets.  From OpenBSD, modified
for NetBSD by me.
2000-10-27 22:49:21 +00:00
thorpej 7f59704e6c Support the second PCI bus on SeverWorks chipsets. From OpenBSD. 2000-10-27 17:55:18 +00:00
thorpej 2644e830b7 BIOS BUG WORKAROUND! The 82443BX datasheet indicates that the only legal
setting for the "Idle/Pipeline DRAM Leadoff Timing (IPLDT)" parameter
(bits 9:8) is 01.  Unfortunately, some BIOSs do not set these bits properly.

Based on a hint from OpenBSD.
2000-10-27 17:47:44 +00:00
soda b63f6b5096 Add another option PCIBIOS_INTR_GUESS for no compatible ICU found case.
Under this option, if only one IRQ is available for the link,
we assumes that the IRQ is already connected, and configure
PCI Interrupt Configuration Register accordingly.
This is what Linux pcmcia-cs-3.1.19 does by default.

This fixes unconfigured pccbb interrupt problem of
Sharp Mebius MN-5500. It's interrupt router is ITExpress Inc. IT8330G.
(http://www.ite.com.tw/, vendor=0x1283, product=0x8330)
Problem reporeted by Kitagawa <sk@kiu.ac.jp> in
http://www.kaynet.or.jp/~kay/ml/netbsd-pcmcia/msg/msg00608.html
2000-08-10 21:18:27 +00:00
nathanw b3e0af3d32 Fix a problem uncovered by rev 1.5 of pcibios.c:
Avoid interpreting the upper 32 bits of 64-bit BARs as a 32-bit BAR.
Otherwise, the code would assume that the value 0 was incorrect and either:
(a) [on bus 0] "fix up" the address to some nonzero value, thus placing
    the decoded address range outside of 32-bit address space, or
(b) [elsewhere] completely disable the device.

The fact that this behaviour depends on the bus number of the device is
already XXX'd.

XXX: This will need revisiting if and when we ever want to handle a PCI bus
XXX: with more than 32 bits of address space on an i386.

The onboard Adaptec 7890 on my Dell Precision Workstation 410 works again.
2000-08-03 20:10:45 +00:00
soda 0cbe0d600f fix oversight introduced in previous my commmitment (revision 1.4),
pointed out by Michael Shalayeff <mickey@openbsd.org>.
2000-08-02 02:54:41 +00:00
uch ae581ace81 reserve AGP space to avoid resource conflict. 2000-08-01 05:23:59 +00:00
soda a86a9c61c4 better message from John Hawkinson <jhawk@MIT.EDU> 2000-07-22 17:43:36 +00:00
soda 87b0dd6e6a make PCIBIOS_IRQS_HINT patchable. 2000-07-18 11:37:56 +00:00
soda 52e3dc4e56 use I386_PCI_INTERRUPT_LINE_NO_CONNECTION instead of magic number. 2000-07-18 11:24:09 +00:00
soda 663add1b20 use PCI_INTERRUPT_PIN_MAX and I386_PCI_INTERRUPT_LINE_NO_CONNECTION,
instead of magic number
2000-07-18 11:23:28 +00:00
soda 81858d7c01 - Use PCIBIOS_PRINTV().
- Use PCI_INTERRUPT_PIN_MAX and I386_PCI_INTERRUPT_LINE_NO_CONNECTION
   instead of magic number.

the Following changes are
{Modified with,Approved by} UCHIYAMA Yasushi <uch@netbsd.org>:

 - Do not touch a PIRQ router, if the PIRQ is already routed
   by the BIOS, or no appropriate IRQ is found for the PIRQ.
   The latter prevents a panic on the machine of Frank van der Linden.

 - Do not modify a PCI Interrupt Configuration register,
   if it is already set by the BIOS, even if it is inconsistent
   with the PCI IRQ routing table provided by the BIOS.
   (The PCI Interrupt Configuration register seems to be more reliable
    than the PCI IRQ routing table.)
   This is needed to prevent a incorrect header_fixup() caused
   by the incorrect PIR table on a Panasonic Let's Note AL-N2T516J5.

   Provide "options PCIBIOS_INTR_FIXUP_FORCE" to retain
   previous behavior, i.e. believe the PCI IRQ routing table
   and ignore the PCI Interrupt Configuration register.
   Although I'm not sure this is really needed.

 - Do not modify a PCI Interrupt Configuration register,
   if appropriate IRQ is not found for the link.

 - Move a pciintr_icu_getclink() call and a pciintr_icu_get_intr()
   call from pciintr_link_fixup() to pciintr_link_alloc(),
   and only allocate pciintr_link_map if those calls succeeded.
   This reduces number of calls of pciintr_icu_getclink(),
   and also avoid necessity to validate a clink value in
   ICU's {get,set}_{intr,trigger}() functions.
   The sanity checks are not removed yet, though.

 - Fix uninitialized usage of variable `bitmap' on stage 3
   of pciintr_link_fixup().

 - Remove a member variable `old_irq' from struct pciintr_link_map.

 - Always use 0x%02x for printf format of canonical link value.

 - Use DIAGNOSTIC instead of PCIINTR_DEBUG for really weird situation.
2000-07-18 11:22:36 +00:00
soda b01ab37ef6 use PCIBIOS_PRINTV() defined in pcibios.h, instead of homegrown DPRINTF(). 2000-07-18 11:18:04 +00:00
soda 698b2b1173 - define pcibiosverbose here, instead of each C source.
- use PIR_DEVFUNC_{DEVICE,FUNCTION}.
2000-07-18 11:15:25 +00:00
soda 0e8343265b - define PCIBIOS_PRINTV() as pcibiosverbose printf() here,
instead of DPRINTF() in each C source.
 - define PIR_DEVFUNC_{DEVICE,FUNCTION}
2000-07-18 11:14:06 +00:00
soda 2f9cb9c128 add several debug printf which can be enabled by PIIX_DEBUG. 2000-07-18 11:10:22 +00:00
soda 9a7e0d82ac - deal with FIRESTAR_PIR_SELECT_PIRQ case on set/get_trigger(),
to prevent a panic on a Panasonic Let's Note AL-N2T516J5.
 - add several debug printf which can be enabled by FIRESTARDEBUG.
 by UCHIYAMA Yasushi <uch@netbsd.org>

 - use I386_PCI_INTERRUPT_LINE_NO_CONNECTION instead of magic number.
2000-07-18 11:07:20 +00:00
mycroft 4087b4e418 Do the interrupt fixup for all busses, not just bus 0.
This is necessary on some machines with multiple onboard PCI busses.
2000-07-09 00:42:47 +00:00
mrg b564830503 remove include of <vm/vm.h>. <vm/vm.h> -> <uvm/uvm_extern.h> 2000-06-29 08:44:03 +00:00
mrg 2f159a1bac remove/move more mach vm header files:
<vm/pglist.h> -> <uvm/uvm_pglist.h>
	<vm/vm_inherit.h> -> <uvm/uvm_inherit.h>
	<vm/vm_kern.h> -> into <uvm/uvm_extern.h>
	<vm/vm_object.h> -> nothing
	<vm/vm_pager.h> -> into <uvm/uvm_pager.h>

also includes a bunch of <vm/vm_page.h> include removals (due to redudancy
with <vm/vm.h>), and a scattering of other similar headers.
2000-06-26 14:20:25 +00:00
cgd cffb580806 Implement the more flexiable `evcnt' interface as discussed (briefly) on
tech-kern and now documented in evcnt(9).
2000-06-04 19:14:14 +00:00
uch a99c8407ab don't destroy PCI bus space extent for rbus_machdep.c 2000-05-31 16:38:55 +00:00
uch b444da72bd Skip fixup phase when system BIOS setting were perfect.
don't write 0 to command register. (it is harmful).
2000-05-17 09:50:34 +00:00
bouyer 9c43539f8f The VIA Technologies VT82C686A SMBus Controller claims to be a PCI/ISA
bridge, ignore it. Should fix kern/10093 by Mark Dohring.
2000-05-12 20:31:22 +00:00
drochner d5d280d015 -attach auxilary PCI buses at the 450NX chipset,
tested by hubertf in a small configuration (1 PXB - 2 PCI buses)
-being here, remove the per-VID/DID matching code which was commented
 out for a while
2000-05-11 16:44:14 +00:00
uch cc30f00dd3 PCI I/O address fixup routine.
When BIOS don't asign PCI I/O address space to device,
        allocate it without conflict and write to PCI configuration header.
2000-04-28 17:19:10 +00:00
uch e3c3882828 PCIBIOS_IRQS changed to PCIBIOS_IRQS_HINT. PCIBIOS_IRQS_HINT is
used when no IRQ guess. when at least 1 PCI device configured
        correctly, unused.
2000-04-28 17:15:15 +00:00
uch 298fbbd162 fix VP3_CFG_INTR_MASK 2000-04-22 15:00:41 +00:00
martin 0a1221cb28 Added a PCI frontend for the legacy ISA joystick driver.
Some PCI soundcards don't seem to use the generic gameport function with
interface 0x10 used here, but have either an own BAR dedicated to this
(i.e. Sonic Vibes or ESS Solo-1) or specify their own device (see
PCI_PRODUCT_CREATIVELABS_SBJOY in sys/dev/pci/pcidevs.h).
Probably these use a similar simple sheme and adding a frontend for them would
be trivial, but I don't own any of these cards, so I didn't.
2000-03-26 15:36:48 +00:00
soren c70220f2a2 Move PCIIDE_CHANNEL_NAME macro to pciidereg.h. 2000-03-09 20:26:31 +00:00
augustss 0acef2fd69 Allow the set of PCI irqs to be overridden. 2000-01-25 17:20:47 +00:00
uch 46fb1c9fce initialize pciirq. 1999-12-13 15:42:05 +00:00
thorpej 2128a07943 Put an interrupt-safe mutex around PCI configuration space access. 1999-12-11 20:48:25 +00:00
thorpej 7f28924acc If we see a bogus $PIR table entry, just ignore it. The MPIIX has
entries for the IRQs used by the IDE controller, which aren't really
PCI IRQs (they're ISA compat IRQs), and thus have link values that
don't make a lot of sense.
1999-11-17 18:55:15 +00:00
thorpej 0d79886ad5 Fix up the PCI bus numbering after fixing up interrupts. 1999-11-17 07:33:41 +00:00
thorpej f4b4d4508a Code from UCHIYAMA Yasushi's PCI BIOS patches to renumber the PCI
busses.
1999-11-17 07:32:58 +00:00
thorpej d6d9fbe240 Interrupt router drivers from UCHIYAMA Yasushi's PCI BIOS patches,
cleaned up and reworked a bit be me.
1999-11-17 01:21:20 +00:00
thorpej 2026e5f71b PCI interrupt routing fixup code, from UCHIYAMA Yasushi's PCI BIOS
patches, cleaned up and heavily reworked by me.  Basic algorithm is
the same, although the code structure is now quite different.

Main differences:
- Initialization path is totally different.
- We use the `compat router' information, if present, to determine which
  PCI ICU driver we should use.
- Fixup configuration headers on devices not on bus 0.
1999-11-17 01:20:38 +00:00
thorpej e345f0f17c Basic interface to the PCI BIOS and PCI Interrupt Routing table, separated
out from UCHIYAMA Yasushi's PCI BIOS patches, and fairly heavily reworked
by me.

Main differences:
- Only use the PCI BIOS to get the config mechanism and interrupt routing
  info for now.  No need to use the BIOS for PCI config access right now,
  since the old mechanism works fine, and this keeps the code smaller.
- PCI BIOS initialization code path is much different.
- Always use the $PIR table if it exists, and only fallback to the
  PCI BIOS 2.1 GetInterruptRouting call if it's not there.

This module does not include any of the fixup code; that is coming
in separate commits.
1999-11-17 01:16:36 +00:00
drochner 2576aadde3 add missing break, spotted by Wolfgang Solfrank 1999-09-20 16:07:45 +00:00