pooka
ca3ea88b7a
add mcclock
2002-05-04 20:06:49 +00:00
briggs
69403fe32b
Remove unreferenced file.
2002-05-04 18:23:35 +00:00
kleink
c1477b6161
Add some comments to the CPP conditionals controlling the trap macro
...
definitions, to ease navigation somewhat.
2002-05-04 17:19:25 +00:00
bjh21
228c4dd3c6
Replace the "machine" logic with something stolen from
...
i386/stand/Makefile.booters. This might make builds with a read-only
source tree happier.
2002-05-04 12:25:00 +00:00
chris
6c4ac1de6e
Implement a proper delay routine for footbridge based systems. Note that
...
until the footbridge is attached we still have to rely on a loop. This
uses TIMER_3 running at 100Hz.
Sadly this doesn't appear to fix the tlp problems, which either means that this
delay routine is not as accurate as it should/could be or tlp is still broken.
2002-05-04 10:04:42 +00:00
takemura
7cd3e3bad5
Fixed line order. It was strange.
2002-05-04 09:37:24 +00:00
takemura
519f3fbad5
Fixed PC Card slot support.
2002-05-04 08:12:18 +00:00
takemura
a9e34d1ccf
Added lib/libsa/files.c to avoid link error.
2002-05-04 07:40:59 +00:00
gmcgarry
2a622dde25
Pull in <bsd.own.mk> for definition of ELF2ECOFF.
2002-05-04 07:26:11 +00:00
takemura
28389b6cb5
Fixed debug messages.
2002-05-04 05:13:28 +00:00
rjs
8394f5575a
Rename cache clean area variables from sa110_* to sa1_*.
2002-05-03 21:28:11 +00:00
scw
caf7ed0a69
main()'s return type should be int', not void'.
2002-05-03 20:48:34 +00:00
briggs
01cc8143e4
Bump symtab space.
2002-05-03 19:52:36 +00:00
thorpej
35fd50c116
Switch to esiop by default (again); it is fully-baked enough to use
...
in production now.
2002-05-03 19:35:53 +00:00
thorpej
da9accb616
Don't define _LP64 here.
2002-05-03 18:27:41 +00:00
thorpej
8606fff875
Don't define _LP64 here.
2002-05-03 17:56:29 +00:00
thorpej
9cbd451a98
Revert revision 1.20.
2002-05-03 17:55:55 +00:00
thorpej
510cbd8934
Revert revision 1.3.
2002-05-03 17:52:17 +00:00
thorpej
9b846773b6
Revert revision 1.20.
2002-05-03 17:51:10 +00:00
thorpej
c66b5e6e38
Revert revision 1.23.
2002-05-03 17:50:19 +00:00
rjs
6812acf29c
Remove CPU_SA110 option.
2002-05-03 16:50:51 +00:00
rjs
94bb29decc
Add correct use of cpu types for SA1100 and SA1110.
2002-05-03 16:46:52 +00:00
rjs
767d5585e0
Use processor specific versions of ARM cache control functions for SA1100
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and SA1110 instead of using SA110 ones.
Rename common StrongARM functions from sa110_* to sa1_*.
Reviewed by Jason Thorpe.
2002-05-03 16:45:21 +00:00
lukem
b933e511b1
nuke installboot.old / bootxx combo (the old "primary bootstrap with
...
hardcoded blocks of secondary bootstrap"); it was only used by the
distrib ustarfs stuff, and that now uses usr/sbin/installboot and ustarboot
2002-05-03 15:36:52 +00:00
rjs
37685e09df
Add sa11x0_context_switch and sa11x0_drain_readbuf.
...
Reviewed by Ben Harris and Jason Thorpe.
2002-05-03 12:43:53 +00:00
takemura
0d9fe6e48c
Enabled USB support for MC-R700.
2002-05-03 11:45:04 +00:00
takemura
9582b7c775
Enable USB support for MC-R700.
2002-05-03 11:37:48 +00:00
takemura
f8cb4c37a0
Fixed debug print.
2002-05-03 07:31:23 +00:00
thorpej
b8e4c037bd
De-obfuscate somewhat; define and use register bit constants, etc.
2002-05-03 04:42:08 +00:00
rafal
13c470a169
R4600 and R5000 count registers count at half-cpu-speed as well.
2002-05-03 03:50:11 +00:00
simonb
13bc33a766
Fix off-by-one error in delay(). Fix from Charles Hannum in ARM code,
...
pointed out by Rafal Boni.
2002-05-03 03:36:51 +00:00
thorpej
2a46fa85a8
Update for recent changes to the ARM pmap. From Hiroyuki Bessho,
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PR 16617.
2002-05-03 03:32:54 +00:00
thorpej
860fe83065
Add support for the Intel PXA210 and PXA250. From Hiroyuki Bessho, PR 16617.
2002-05-03 03:28:48 +00:00
thorpej
5573190305
Add the CPU_XSCALE_PXA2X0 option. From Hiroyuki Bessho, PR 16617.
2002-05-03 02:43:19 +00:00
rafal
4cebb807c9
Cosmetic change.
2002-05-03 01:51:38 +00:00
rafal
2eece4af5f
Update copyright dates.
2002-05-03 01:49:21 +00:00
thorpej
46a3731866
Move the CPU/clock/memory-related options to std.dreamcast, since
...
they are constant across all Dreamcast systems.
2002-05-03 01:36:02 +00:00
rafal
c92f3647a4
Fix up clock interrupt accounting for the sgimips port -- make sure
...
to schedule clock interrupts at a fixed interval, rather scheduling
the next one based on the time of the arrival/servicing of the previous
clock interrupt. Also, pick up a trick from the sbmips port to convert
a division in ip22_clkread to a multiplication, since those are much
cheaper -- the details of that are described in Simon's commit (see
Message-Id: <20020306073437.1D2A8B004@cvs.netbsd.org>). Thanks to
Jason Thorpe and Dominic Sweetman's "See MIPS Run" (where I found
mention of this very subject while looking for something totally un-
related! 8-) for the clue about the source of the timekeeping problems.
For the IP32, where we have no clock-calibration code yet, use the CPU
frequency provided by ARCS instead; it beats a hard-coded value!
As an added bonus, most of the CPU-clock related stuff is now collected
together in cpu_info_store, rather than as a collection of unorganized
global variables.
2002-05-03 01:13:54 +00:00
eeh
be9ab3e5db
Provide _LP64 definition if we are generating LP64 binaries.
2002-05-03 00:06:55 +00:00
rjs
9646735a82
Enable CPU_CLASS_SA1 for SA1100 and SA1110.
2002-05-02 22:57:36 +00:00
rjs
2aae453976
Make it compile when VERBOSE_ARM32 is defined.
2002-05-02 22:47:09 +00:00
mycroft
47c99ba59e
Fix off-by-one error in delay().
2002-05-02 22:01:46 +00:00
rafal
ab8f2fbc01
Add interrupt counter for Seeq interrupts; also, make sure to reset back to
...
"recieve only my frames & broadcasts" and clear the ALLMULTI flag if we have
no multicast addresses in our list.
2002-05-02 20:31:19 +00:00
rafal
1a73d72d3b
If we handle multiple events from the zs chip in one interrupt, don't count
...
that as multiple interrupts.
2002-05-02 20:26:49 +00:00
wiz
851d26f9a9
Make sure the machine symlink is there in the dependall step.
2002-05-02 18:54:32 +00:00
wiz
aa4109feb4
Add machine symlink to CLEANFILES.
2002-05-02 18:35:02 +00:00
wiz
8015e58333
Since loadfile_machdep.h isn't installed anymore, link the mmeye include
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directory into ${.OBJDIR} and find the header file there.
2002-05-02 18:30:46 +00:00
rafal
e65d64e370
Since we don't have code to drive the L2 cache on R4600/R5k processors,
...
disable the L2 cache so at least things work (albeit more slowly) on
the SC versions of those chips. Tested on a R4600 Indy and a R4400
Challenge S.
2002-05-02 18:00:40 +00:00
wiz
f7a47b635a
Remove #ifdef RC7500 defines.
2002-05-02 17:25:31 +00:00
thorpej
efb8222642
Fix error reporting in the bus_dmamap_load_mbuf() routines.
2002-05-02 16:50:39 +00:00
