Commit Graph

55 Commits

Author SHA1 Message Date
wiz d20841bb64 Uppercase CPU, plural is CPUs. 2004-02-13 11:36:08 +00:00
chris 25c741b8a6 Fix up some unitialised variables. 2003-10-26 23:11:15 +00:00
rearnsha ec2b5e2dfd Support for ARM10E class devices. 2003-09-06 09:42:12 +00:00
mycroft b715eaff3c Recognize some TI processors -- not that you'd want to use them. 2003-09-03 02:07:07 +00:00
martin d505b18964 Make sure to include opt_foo.h if a defflag option FOO is used. 2003-06-23 11:00:59 +00:00
ichiro 00eb02e3da support IXP425 Intel Network Processor
running on BigEndian
2003-05-23 00:57:23 +00:00
thorpej b43b1645a2 Use aprint*(). 2003-04-29 01:07:30 +00:00
rjs ce385ae9b3 Add CPU IDs for PXA B2 and C0 steppings. 2003-02-14 16:00:33 +00:00
wiz 5e442fbbdd specified, not specifed. 2003-01-06 12:38:47 +00:00
chs 4b2625143d change uvm_uarea_alloc() to indicate whether the returned uarea is already
backed by physical pages (ie. because it reused a previously-freed one),
so that we can skip a bunch of useless work in that case.
this fixes the underlying problem behind PR 18543, and also speeds up fork()
quite a bit (eg. 7% on my pc, 1% on my ultra2) when we get a cache hit.
2002-11-17 08:32:43 +00:00
chris a28f4c93a2 Fix arm kernel build breaks for non multiprocessor systems. 2002-10-13 21:14:28 +00:00
bjh21 75248cc7a1 It appears that MI code requires ci_cpuid to be the CPU number of the CPU
in question, whereas the ARM code was using it to hold the model
identification.  To fix this, rename:

ci_cpuid -> ci_arm_cpuid
ci_cputype -> ci_arm_cputype (for consistency)
ci_cpurev -> ci_arm_cpurev (ditto)
ci_cpunum -> ci_cpuid

This makes top(1) give correct CPU numbers in its "STATE" column (all 0 for
now).
2002-10-13 12:24:57 +00:00
bjh21 d8fd346734 Remember the location of each CPU's idle PCB in struct cpu_info.
Move allocation of the idle PCB from hydra.c to cpu.c and add some
extra initialisation from cpu_fork().
2002-10-12 21:06:46 +00:00
bjh21 b828507087 constify various string tables. 2002-10-01 22:33:10 +00:00
gehenna 77a6b82b27 Merge the gehenna-devsw branch into the trunk.
This merge changes the device switch tables from static array to
dynamically generated by config(8).

- All device switches is defined as a constant structure in device drivers.

- The new grammer ``device-major'' is introduced to ``files''.

	device-major <prefix> char <num> [block <num>] [<rules>]

- All device major numbers must be listed up in port dependent majors.<arch>
  by using this grammer.

- Added the new naming convention.
  The name of the device switch must be <prefix>_[bc]devsw for auto-generation
  of device switch tables.

- The backward compatibility of loading block/character device
  switch by LKM framework is broken. This is necessary to convert
  from block/character device major to device name in runtime and vice versa.

- The restriction to assign device major by LKM is completely removed.
  We don't need to reserve LKM entries for dynamic loading of device switch.

- In compile time, device major numbers list is packed into the kernel and
  the LKM framework will refer it to assign device major number dynamically.
2002-09-06 13:18:43 +00:00
briggs c13ee269dd Handle i80200 step D0 and i80321 step B0 2002-07-22 18:17:42 +00:00
ichiro 83c0b66d47 add cpu id for "PXA250/210 3rd version CPUcore".
for using many PDA/xscale-core.
2002-07-10 07:00:50 +00:00
thorpej ffe1440f29 Add the CPU ID for the 600MHz i80321 part. 2002-06-07 18:25:28 +00:00
ichiro be557a5f28 change ICP12x0 steppings.
define CPU_IXP12X0
2002-05-12 15:05:41 +00:00
thorpej 22cea0e73c Add IXP1200 steppings. 2002-05-10 17:50:25 +00:00
thorpej 860fe83065 Add support for the Intel PXA210 and PXA250. From Hiroyuki Bessho, PR 16617. 2002-05-03 03:28:48 +00:00
rjs 9646735a82 Enable CPU_CLASS_SA1 for SA1100 and SA1110. 2002-05-02 22:57:36 +00:00
thorpej 32a0860797 Centralize ARM CPU configuration information by adding a new header
file, <arm/cpuconf.h>, which pulls in "opt_cputypes.h" and then defines
the following:
* CPU_NTYPES -- now many CPU types are configured into the kernel.  What
  you really want to know is "== 1" or "> 1".
* Defines ARM_ARCH_2, ARM_ARCH_3, ARM_ARCH_4, ARM_ARCH_5, depending
  on which ARM architecture versions are configured (based on CPU_*
  options).  Also defines ARM_NARCH to determins how many architecture
  versions are configured.
* Defines ARM_MMU_MEMC, ARM_MMU_GENERIC, ARM_MMU_XSCALE depending on
  which classes of ARM MMUs are configured into the kernel, and ARM_NMMUS
  to determine how many MMU classes are configured.

Remove the needless inclusion of "opt_cputypes.h" in several places.
Convert remaining users to <arm/cpuconf.h>.
2002-04-12 18:50:29 +00:00
thorpej c915b880c5 The 80321 manual lies; it does have a CPU ID distinct from the 80200.
Add that CPU ID, and add a case for it.
2002-03-27 01:34:47 +00:00
thorpej 41f47f03e7 Restructure a few things in order to support other XScale core
I/O processors:
* The i80200 and the i80321 have the same CPU ID, so split the
  CPU_XSCALE option into CPU_XSCALE_80200 and CPU_XSCALE_80321
  options, and don't let them both be defined at the same time.
  XXX May want to revisit this in the future.
* Split some registers common between the i80200 and i80321 into
  <arm/xscale/xscalereg.h>.
* Rename a few existing functions.
2002-03-26 19:29:44 +00:00
thorpej ea553e2681 Cache the cpu type and cpu revision in cpu_info. 2002-03-24 22:02:58 +00:00
bjh21 a12e90b08f Only put the CPU type into cpu_model, not the state of the control register.
Instead, print the control register state on the next line at startup.
2002-03-16 18:47:51 +00:00
bjh21 57eb77d59f Add CPU ID for the ARM1022ES.
Also add a CPU class for ARM10E processors in general.
2002-03-16 14:41:15 +00:00
reinoud b91c20709e When ARMFPE wasn't enabled the `usearmfpe' flag was statically initialised
but not used resulting in a compiler error. By splitting the declaration
and the initialisation this is solved.

Better would be to not even declare the flag when ARMFPE isnt enabled but
that would just add to the #ifdef jungle.
2002-03-11 11:50:12 +00:00
bjh21 a42e17ae9a __RCSID -> __KERNEL_RCSID 2002-03-10 15:47:43 +00:00
bjh21 3a0f83d390 Re-work the way that FPAs are handled. If ARMFPE isn't configured, don't
even bother probing for an FPA.  If ARMFPE is configured, always use it,
even if there's an FPA (since it provides the FPA support code).  Move all
printfs about FPAs into armfpe_init.c.

This means I can delete the last two elements from struct _cpu, so that the
structure, and the whole of <arm/cpus.h> is redundant and can be deleted.
2002-03-10 15:29:53 +00:00
bjh21 9bb7807c7b Remove fpu_model from struct _cpu. Instead, have initialise_arm_fpe()
printf() the FPE version number itself.
2002-03-10 11:32:00 +00:00
bjh21 63231772e8 Add a ci_dev element to struct cpu_info, pointing to the device that
corresponds to the CPU.
2002-03-10 11:06:01 +00:00
bjh21 60219ba2a6 Kill the fpu_flags element from struct _cpu. It was only ever set to 0
anyway.
2002-03-10 00:44:09 +00:00
bjh21 01b68bd7de Clean up inline assembler. Rather than saving R0, copying FPSR to R0,
copying it to the output register and then restoring R0, just copy the
FPSR straight to the output.
2002-03-10 00:09:24 +00:00
bjh21 aeece3b5bd Remove the cpu_model member from struct _cpu, and just use the cpu_model
variable directly.  While we're at it, make cpu_model rather larger.
2002-03-09 23:49:15 +00:00
bjh21 09dd49a342 Remove the cpu_class element from struct _cpu, and make it a local variable
in identify_arm_cpu(), since it's almost unused elsewhere.

Change the detection of bugged StrongARMs to use the cpu ID rather than the
class.  This turns "almost" into "entirely".
2002-03-09 23:24:11 +00:00
bjh21 1c1e3f8439 Replace cpu_id and cpu_ctrl in struct _cpu with ci_cpuid and ci_ctrl in
struct cpu_info.  Also kill the cpuctrl global while we're here, and make
identify_arm_cpu() take a struct cpu_info * as an argument alongside the CPU
number.
2002-03-09 21:30:57 +00:00
bjh21 20917f120c Move arm700bugcount into stuct cpu_info, and attach it in
identify_master_cpu().
2002-03-09 19:11:20 +00:00
bjh21 e6e848ef6d Our assembler handles FPA instructions fine, so don't use .word for them. 2002-02-17 20:41:02 +00:00
bjh21 cb7a3d0674 ANSIfy, and othe KNF cleanup. 2002-02-17 19:53:44 +00:00
bjh21 e4b1cbedfc Add revision->stepping maps for the SA-110, SA-1100 and SA-1110.
Those for the SA-1100 and SA-1110 are from Intel's documentation.
The mapping for the SA-110 is from various sources on the net, since Intel
don't seem to document it.

Also, change the layout of the maps to have four steppings per line,
so they aren't quite so unwieldy.
2002-01-27 14:43:47 +00:00
thorpej c2004821b2 Use a table to look up stepping names. Add a generic stepping
table ("rev 0", "rev 1", etc.) and an i80200 stepping table that
has the stepping names that appear in the i80200 manuals/errata..
2002-01-24 20:14:19 +00:00
thorpej 959181a8b2 Fetch cache info from the Cache Type register on ARM7TDMI and "greater"
processors.  Report this when the processor is attached.
2001-11-29 02:24:58 +00:00
thorpej 87fe867c21 Move the ARM, Ltd. floating point emulator to arch/arm. 2001-11-24 01:26:23 +00:00
thorpej fc019be5fd Use <arm/undefined.h> instead of <machine/undefined.h>. 2001-11-23 21:18:29 +00:00
thorpej 46309d6bc6 Const poisoning of cpu/class names. 2001-11-06 20:39:13 +00:00
thorpej 5b3f78d953 "i80200", not "80200". 2001-11-06 20:02:13 +00:00
thorpej f12c8ee306 "XScale", not "Xscale". 2001-11-06 19:59:43 +00:00
rearnsha bc8cd3375d Support for ARM9. 2001-10-18 15:19:58 +00:00