78ddb4758e
Deal with 2GB of ram or memory ending at or above 4GB.
2015-05-04 00:44:12 +00:00
4287fca664
Fix 4GB wraparound math.
2015-05-04 00:41:42 +00:00
5617d6aa97
If not using LPAE, if memory ends at 4GB ignore the last page so physical_end
...
doesn't wrap to 0.
2015-05-04 00:12:56 +00:00
a53699f70e
Teach a couple of i2cbus controllers how to rescan. This enables
...
{,un}loading and {at,de}taching of the iic(4) driver/module at a
later time. Tested piixpm on QEMU, and ichsmb on my live server.
2015-05-03 22:51:11 +00:00
6e27dfa8cf
since we dont support SDR104 yet, dont try to optimize it; instead, optimize for HS mode, which brings us up from 34 MHz to 45.333 MHz
2015-05-03 22:40:02 +00:00
c82d0cfd23
print some useful information at attach time
2015-05-03 22:37:27 +00:00
572ab4e2b8
Put the '/' back, but put it in the correct location!
2015-05-03 21:59:23 +00:00
5e96a9e7b1
disable MULTIPROCESSOR for now
2015-05-03 18:49:28 +00:00
ec484ab4fe
UART clock source is PLLP. Set com type to COM_TYPE_TEGRA.
2015-05-03 17:24:45 +00:00
ecb2b6ae4b
add COM_TYPE_TEGRA
2015-05-03 17:22:54 +00:00
bcce07f3b2
add pllc and uart rate funcs
2015-05-03 16:40:12 +00:00
40d5a9d580
On secondary cores, invalidate the caches to make them clean.
2015-05-03 16:18:51 +00:00
2d0cfa998a
PR 49870: pass the xsrc path to postinstall
2015-05-03 15:13:13 +00:00
432881ad82
Make sure callout is halted, not just stopped, before freeing memory.
2015-05-03 15:07:12 +00:00
4e3bd6105a
add new ethernet driver mvxpe for recent MARVELL's SoC after ARMADA/XP.
...
this driver supports 'counter mode', and is disabled by default.
ARMADA SoC family has new ethernet controller acceleration mode called
'enhanced mode' or 'counter mode.' it seems that backward compatibility mode
used by if_mvgbe is still working, but the specification of the old mode
is completely disappeared from SoC's reference manual.
I tested the driver using MIRABOX(ARMADA/370).
2015-05-03 14:38:09 +00:00
593de75e05
Sort SEE ALSO.
2015-05-03 12:29:28 +00:00
a4569887ef
Sort ERRORS and SEE ALSO.
2015-05-03 12:27:32 +00:00
64afd1ea16
when setting sdmmc divisor, do a full reset / enable sequence
2015-05-03 11:47:15 +00:00
10c0159579
set SDHC_FLAG_SINGLE_POWER_WRITE
2015-05-03 11:46:44 +00:00
e974ccfaa2
Add SDHC_FLAG_SINGLE_POWER_WRITE flag, that tells the driver to update
...
the SDHC_POWER_CTL register with a single write rather than in multiple
steps. Required for Tegra K1 SDHC.
2015-05-03 11:46:25 +00:00
f5df4fc799
Rename delay variable as it shadows a global on arm.
2015-05-03 10:44:04 +00:00
5929e90778
Fix typo, fix the build-break. One '/' is enough in path names.
2015-05-03 07:30:52 +00:00
560d01237b
regen.
2015-05-03 06:29:48 +00:00
3cf6633124
write back unaligned boundary of L2 cache even if invalidate operation
...
is requested.
2015-05-03 06:29:31 +00:00
38b43c2941
Add some NVIDIA devices.
2015-05-03 06:29:21 +00:00
5f2c7f7738
flip (NULL == addr) to (addr == NULL) use in conditional from previous
...
commit.
2015-05-03 04:18:45 +00:00
6fb6cabb23
Include the new tco module on i386 and amd64 builds
2015-05-03 02:55:04 +00:00
90df75aa93
Build the tco watchdog module
2015-05-03 02:54:07 +00:00
5b9fcd9abb
Update to include the tco driver (it was previously included as part of
...
ichlpcib).
2015-05-03 02:52:50 +00:00
ed77961ac5
Separate the watchdog code from the pcib code, and make the watchdog
...
a loadable module.
2015-05-03 02:50:59 +00:00
e114a7d535
coherent dma tag doesnt quite work
2015-05-03 01:26:44 +00:00
e1b20f2837
Add Tegra K1 PCIE support.
2015-05-03 01:07:44 +00:00
99f92b6303
Deal with 64-bit BARs
2015-05-03 00:04:06 +00:00
f6bef303da
compare mbuf * pointer to NULL instead of 0
2015-05-02 23:46:04 +00:00
a6b82aa2c6
grow it a bit.
2015-05-02 23:21:40 +00:00
c027610558
remove unnecessary check that nam != NULL before deref in soconnect()
...
(added in previous commit).
sockargs copyin() makes sure we don't get NULL here
2015-05-02 21:15:33 +00:00
5cad40c933
Fix !ARP build.
2015-05-02 20:22:12 +00:00
487c8ce86e
make soconnect() fail with EAFNOSUPPORT if the domain of the socket does
...
not match family received in the sockaddr.
* connect() now fails as documented in connect(2).
* atf test t_connect:connect_foreign_family now passes.
2015-05-02 20:10:26 +00:00
f1588c096e
For mips64, build kmodules using N64 ABI
2015-05-02 18:18:13 +00:00
e27ef76d92
mips_{l,s}d_a64 only valid for !O32
2015-05-02 18:16:17 +00:00
313761704f
Don't define MIPS1/MIPS32/MIPS32R2 if ABI is N32 or N64.
2015-05-02 17:39:31 +00:00
fd12cf39ee
make connect syscall use sockaddr_big and modify pr_{send,connect}
...
nam parameter type from buf * to sockaddr *.
final commit for parameter type changes to protocol user requests
* bump kernel version to 7.99.15 for parameter type changes to pr_{send,connect}
2015-05-02 17:18:03 +00:00
581102ab39
jetsontk1 specific gpio setup for sdhc
2015-05-02 17:15:20 +00:00
a1d68d25dd
hook up power, card detect, write protect gpios
2015-05-02 17:07:55 +00:00
661ea74b3f
simplify gpio kpi
2015-05-02 17:06:53 +00:00
3e7abb15ef
Remove unintended commit
2015-05-02 16:20:41 +00:00
081bd3c0df
Move /* A5.2.10 Synchronisation primitives */ block earlier so it
...
matches correctly
2015-05-02 16:18:49 +00:00
df4214b3bd
Note import of dhcpcd-6.8.2
2015-05-02 15:23:49 +00:00
866e96fa79
Appease gcc.
2015-05-02 15:22:03 +00:00
4d6391b4f4
Sync
2015-05-02 15:18:36 +00:00
matt