addressing mode. In these cases, the physical address must be aligned to
256-bits. To handle this, pre-allocate a MAXPHYS sized bounce buffer and
use it for unaligned transfers.
Fixes "edma errint!" problem mentioned in port-arm/50288.
(correctly according to usb 2.0 specification 8.5.3) uses IN status stage
when no (zero length) data stage. Instead read into a 1 byte array.
My uplcom(4) now works on RPI.
Remove the expensive tests in _have_rc_postprocessor(), as proposed by apb@.
It more than halves the multiuser boot time on slow machines and brings
it back near to the previous level.
free it. Allocating from the stack does not return null, and freeing it
will have unpredictable results. use malloc instead.
- now we are using malloc remove -Wno-stack-protector kludge
- In PCI-X cap, print 2nd bus's PCI-X mode, error protection type, Max clock
frequency and Max clock period.
- In SATA cap, print register location correctly.
- In Virtual Channel cap, print reference clock with "ns".
- In Root Complex Link Declaration, print Link Entry number.
- Drop PHY_CTRL_GBE_DIS explicitly in wm_lplu_d0_disable() in case BIOS sets
this bit.
- Fix two bugs in wm_kmrn_lock_loss_workaround_ich8lan(). Now the function
checks the status correctly but it causes linkdown up to 10 times, so it's
disabled for the time being.
on PCH2.
- Clear WMREG_WUC in wm_reset() if the chip >= 82544. This might fix the
behavior on suspend/resume.
- Fix logic of wm_check_reset_block() on ICH* and PCH*. This change might fix
a problem that PHY's read/write functions can't get semaphore.
- Fix wm_check_mng_mode_ich8lan(). This function is used only when WM_WOL is
defined and it's disabled by default.
- KNF.
