Remove the EMUL_HAS_SYS___syscall test, because the handler is no longer shared
with SVR4.
Rather than comparing with e_nsysent, just mask the value. This is only done
to protect us from malicious programs anyway.
Also, there is no reason to save the original PC; there are no restartable
syscalls that change the PC -- and even if there were, they wouldn't do it
in the restart case.
* move all exec-type specific information from struct emul to execsw[] and
provide single struct emul per emulation
* elf:
- kern/exec_elf32.c:probe_funcs[] is gone, execsw[] how has one entry
per emulation and contains pointer to respective probe function
- interp is allocated via MALLOC() rather than on stack
- elf_args structure is allocated via MALLOC() rather than malloc()
* ecoff: the per-emulation hooks moved from alpha and mips specific code
to OSF1 and Ultrix compat code as appropriate, execsw[] has one entry per
emulation supporting ecoff with appropriate probe function
* the makecmds/probe functions don't set emulation, pointer to emulation is
part of appropriate execsw[] entry
* constify couple of structures
This was not added also to other config files primarily because the
driver is not properly tested yet; this entry is primarily meant as an example
for those brave souls who want to try moxa.
rather than assigning to the whole field, set or clear individual flags,
which implies that the B_BUSY and B_INVAL flags will remain set.
this allows us to make the assertion in brelse() that B_BUSY is set,
which is the purpose of all this.
cpuid instruction, which is used to differentiate between Celeron, common PIII
and PIII Xeon; recognize it and print appropriate info if applicable
Information taken from Intel's (R)
Intel Processor Identification and the CPUID Instruction, AP-485
in port-i386/11502, with only sligh change for Coppermine entry -
cpus with family 6, model 8 are not all Celerons, they can be
either common PIII, Xeon or Celeron
Current status:
Only OHCI chip is supported (fwohci).
ping (IPv4) works with Sony's implementation (SmartConnect) on Win98.
sometimes works but not stable.
Not implemented yet:
IRM (Isochronous Resource Manager) functionality.
Link layer fragmentation.
Topology map.
More to do:
clean ups
MCAP
charactor device part
dhcp
There is no entry in GENERIC config file yet.
Follow sys/dev/ieee1394/IMPLEMENTATION to enable if_fw.
type in biosdiskopen(), and if it is of type FS_RAID, add 64 to d->b_off.
NOTE: installboot(8) still needs some hacking to DTRT, but at least this way
if you can load "/boot" off another partition (e.g, wd0h), then wd0a can be
of type `RAID' with a raidframe mirror at the start and the kernel
will load OK of wd0a, and with raidctl -A root partitions, it will change
root as well.
setting for the "Idle/Pipeline DRAM Leadoff Timing (IPLDT)" parameter
(bits 9:8) is 01. Unfortunately, some BIOSs do not set these bits properly.
Based on a hint from OpenBSD.
pseudo-device pty 2 # pseudo-terminals (Sysinst needs two)
(Some installers may not be using sysinst, in which case this just reduces
the number of ptys from 16 that are not used to 2 that are not used)
For i386 conf files, no change other than comments.
apm was enabled in the wrong file, it's not needed in INSTALL_LAPTOP,
but should be there in GENERIC_LAPTOP.
wss0 at isa irq 10 may cause conflicts on some laptops; remove it.
Despite its name, PCIBIOS_INTR_GUESS is safe option, so enable it.
ports aren't supported for installation), MFS, slip and ppp. There
was no room for pppd and slattach on the "tiny" floppies anyway, so
there was nothing to use them.
Add pcic at isa, pcmcia, wdc at pcmcia, and 'wireful' cards @ pcmcia
(ne, ep, mbe, sm). Installing is now possible on a 4M laptop over
ethernet (tested with ep at pcmcia, and 640+3200 available memory).
based on it working already for macppc.
Also add commented out:
#options VNODE_OP_NOINLINE # Don't inline vnode op calls
#options NFS_V2_ONLY # Exclude NFS3 and NQNFS code
as suggestions for additional savings
maps standard boot flags to corresponding RB_* values
use BOOT_FLAG() in port's MD code as appropriate
as discussed on tech-kern, add new boot flags -v, -q for booting
verbosely or quietly, and corresponding AB_VERBOSE/AB_QUIET
boot flags; also add FreeBSD-compatible bootverbose macro and
NetBSD-specific bootquiet macro
for hpcmips, use new bootverbose instead of it's own hpcmips_verbose
Tested on i386, and to limited extend (compile of affected files) also for
mvme68k, hp300, luna68k, sun3.
that the page being zero'd was not completed and that page zeroing
should be aborted. This may be used by machine-dependent code doing
slow page access to reduce the latency of running a process that has
become runnable while in the middle of doing a slow page zero.
- Don't fall into infinite loop even if the # of iteration necessary isn't 1.
- Don't interpret lower 8bit of AL, which is # of iteration, as a descriptor.
routine. Works similarly fto pmap_prefer(), but allows callers
to specify a minimum power-of-two alignment of the region.
How we ever got along without this for so long is beyond me.
and large page support. This version is a bit more intelligent about
how it deals with kernel text pages.
Now that this is fixed, don't map the kernel text read-write if
DDB is configured.
- Return FALSE if the PTE does not have PG_V set (previously, you would
get always get true of the PDE was valid, even if the PTE was not).
- Teach it about 4MB pages.
in the non-MULTIPROCESSOR case (LOCKDEBUG requires it). Scheduler
lock is held upon entry to mi_switch() and cpu_switch(), and
cpu_switch() releases the lock before returning.
Largely from Bill Sommerfeld, with some minor bug fixes and
machine-dependent code hacking from me.
need to access this when we have the proclist locked for reading,
and thus cannot store it in the PCB (which may be swapped out).
As part of this, call pmap_activate() from cpu_switch() to switch
to the new address space, and refresh the PCB's copy of the LDT
selector from the pmap structure (see above paragraph). We need
to do this for MP support anyhow.
Fixes a "panic: spinlock_switchcheck: CPU 0 has 1 spin locks" via
gdt_compact() reported by Nathan Williams.
so that special setup functions needed for some CPUs will be run before
some things (like UVM) are inited.
Add vm_page_zero_enable = FALSE to the cyrix 6x86 case, as page zeroing
while idle causes problems.
while suspended. When waking up the power hooks are again called at
splhigh() and then the level is lowered.
This prevents interrupts from reaching a device before the power hook
has reinitialized it.
Under this option, if only one IRQ is available for the link,
we assumes that the IRQ is already connected, and configure
PCI Interrupt Configuration Register accordingly.
This is what Linux pcmcia-cs-3.1.19 does by default.
This fixes unconfigured pccbb interrupt problem of
Sharp Mebius MN-5500. It's interrupt router is ITExpress Inc. IT8330G.
(http://www.ite.com.tw/, vendor=0x1283, product=0x8330)
Problem reporeted by Kitagawa <sk@kiu.ac.jp> in
http://www.kaynet.or.jp/~kay/ml/netbsd-pcmcia/msg/msg00608.html
- MB_LEN_MAX is increased to 32.
- To ensure binary compatibility for old executables
under multibyte locale, versioned setlocale is added.
- __mb_len_cur definision is added in setlocale.c
and enable it in stdlib.h .
It is also important for multibyte locale stuffs,
but I just forgot.
Avoid interpreting the upper 32 bits of 64-bit BARs as a 32-bit BAR.
Otherwise, the code would assume that the value 0 was incorrect and either:
(a) [on bus 0] "fix up" the address to some nonzero value, thus placing
the decoded address range outside of 32-bit address space, or
(b) [elsewhere] completely disable the device.
The fact that this behaviour depends on the bus number of the device is
already XXX'd.
XXX: This will need revisiting if and when we ever want to handle a PCI bus
XXX: with more than 32 bits of address space on an i386.
The onboard Adaptec 7890 on my Dell Precision Workstation 410 works again.
- Use PCI_INTERRUPT_PIN_MAX and I386_PCI_INTERRUPT_LINE_NO_CONNECTION
instead of magic number.
the Following changes are
{Modified with,Approved by} UCHIYAMA Yasushi <uch@netbsd.org>:
- Do not touch a PIRQ router, if the PIRQ is already routed
by the BIOS, or no appropriate IRQ is found for the PIRQ.
The latter prevents a panic on the machine of Frank van der Linden.
- Do not modify a PCI Interrupt Configuration register,
if it is already set by the BIOS, even if it is inconsistent
with the PCI IRQ routing table provided by the BIOS.
(The PCI Interrupt Configuration register seems to be more reliable
than the PCI IRQ routing table.)
This is needed to prevent a incorrect header_fixup() caused
by the incorrect PIR table on a Panasonic Let's Note AL-N2T516J5.
Provide "options PCIBIOS_INTR_FIXUP_FORCE" to retain
previous behavior, i.e. believe the PCI IRQ routing table
and ignore the PCI Interrupt Configuration register.
Although I'm not sure this is really needed.
- Do not modify a PCI Interrupt Configuration register,
if appropriate IRQ is not found for the link.
- Move a pciintr_icu_getclink() call and a pciintr_icu_get_intr()
call from pciintr_link_fixup() to pciintr_link_alloc(),
and only allocate pciintr_link_map if those calls succeeded.
This reduces number of calls of pciintr_icu_getclink(),
and also avoid necessity to validate a clink value in
ICU's {get,set}_{intr,trigger}() functions.
The sanity checks are not removed yet, though.
- Fix uninitialized usage of variable `bitmap' on stage 3
of pciintr_link_fixup().
- Remove a member variable `old_irq' from struct pciintr_link_map.
- Always use 0x%02x for printf format of canonical link value.
- Use DIAGNOSTIC instead of PCIINTR_DEBUG for really weird situation.
mycroft