Commit Graph

6 Commits

Author SHA1 Message Date
christos
95e1ffb156 merge ktrace-lwp. 2005-12-11 12:16:03 +00:00
perry
f31bd063e9 nuke trailing whitespace 2005-02-27 00:26:58 +00:00
thorpej
4cd18f3872 Fix the Bridge Control Register bit definitions, add ones that
appeared in PCI 2.2.
2001-11-08 03:18:12 +00:00
mcr
ddb7c50037 added bridge secondary bus reset macros. 2001-07-06 18:07:16 +00:00
cgd
7fda077700 (1) provide #defines for cf_loc[] entries for devices that attach to
pcibus and pci.
(2) remove the #ifdef i386 from pci.c, and provide a machine-dependent
    hook (pci_md_attach_hook()) to do any machine-dependent attachment
    gunk, e.g. on the i386 printing out the configuration mode (if bus 0)
(3) don't pass max device number for a given bus in, use
    PCI_MAX_DEVICE_NUMBER, which can be defined on a per-machine basis.
    (defaults to 32.  on i386, it's 32 if pci conf mode == 1, 16 if 2.)
1996-03-14 02:35:32 +00:00
cgd
47e551efff Preliminary support for PCI-PCI bridges. Recognize a PCI-PCI bridge
and attach the secondary pci bus as a 'pci' device.  Note that this support
is incomplete and will not yet work for ports other than that i386.  (The
i386 can rely on the PCI interrupt 'line' information to determine
interrupt mapping, which is not necessarily possible on other systems.)
1996-02-28 01:46:32 +00:00