Preliminary support for PCI-PCI bridges. Recognize a PCI-PCI bridge
and attach the secondary pci bus as a 'pci' device. Note that this support is incomplete and will not yet work for ports other than that i386. (The i386 can rely on the PCI interrupt 'line' information to determine interrupt mapping, which is not necessarily possible on other systems.)
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154
sys/dev/pci/ppb.c
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154
sys/dev/pci/ppb.c
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/* $NetBSD: ppb.c,v 1.1 1996/02/28 01:46:32 cgd Exp $ */
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/*
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* Copyright (c) 1996 Christopher G. Demetriou. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by Christopher G. Demetriou
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* for the NetBSD Project.
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* 4. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* XXX NOTE:
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* XXX PROPER OPERATION OF DEVICES BEHIND PPB'S WHICH USE INTERRUPTS
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* XXX ON SYSTEMS OTHER THAN THE i386 IS NOT POSSIBLE AT THIS TIME.
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* XXX There needs to be some support for 'swizzling' the interrupt
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* XXX pin. In general, pci_map_int() has to have a different
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* XXX interface.
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*/
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <sys/device.h>
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#include <dev/pci/pcireg.h>
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#include <dev/pci/pcivar.h>
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#include <dev/pci/pcidevs.h>
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#include <dev/pci/ppbreg.h>
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struct ppb_softc {
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struct device sc_dev;
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/*
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* Primary bus information.
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*/
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pcitag_t sc_p_tag; /* tag of this device */
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/*
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* Secondary bus information.
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*/
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int sc_s_num; /* secondary bus number */
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};
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int ppbmatch __P((struct device *, void *, void *));
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void ppbattach __P((struct device *, struct device *, void *));
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struct cfdriver ppbcd = {
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NULL, "ppb", ppbmatch, ppbattach, DV_DULL, sizeof(struct ppb_softc)
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};
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static int ppbprint __P((void *, char *pnp));
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int
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ppbmatch(parent, match, aux)
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struct device *parent;
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void *match, *aux;
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{
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struct cfdata *cf = match;
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struct pci_attach_args *pa = aux;
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/*
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* Check the ID register to see that it's a PCI bridge.
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* If it is, we assume that we can deal with it; it _should_
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* work in a standardized way...
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*/
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if (PCI_CLASS(pa->pa_class) == PCI_CLASS_BRIDGE &&
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PCI_SUBCLASS(pa->pa_class) == PCI_SUBCLASS_BRIDGE_PCI)
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return (1);
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return (0);
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}
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void
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ppbattach(parent, self, aux)
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struct device *parent, *self;
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void *aux;
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{
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struct ppb_softc *sc = (struct ppb_softc *)self;
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struct pci_attach_args *pa = aux;
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struct pcibus_attach_args pba;
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pcireg_t data;
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char devinfo[256];
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sc->sc_p_tag = pa->pa_tag;
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pci_devinfo(pa->pa_id, pa->pa_class, 0, devinfo);
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printf(": %s (rev. 0x%02x)\n", devinfo, PCI_REVISION(pa->pa_class));
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data = pci_conf_read(sc->sc_p_tag, PPB_REG_BUSINFO);
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sc->sc_s_num = PPB_BUSINFO_SECONDARY(data);
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if (sc->sc_s_num == 0) {
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printf("%s: not configured by system firmware\n",
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self->dv_xname);
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return;
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}
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#if 0
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/*
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* XXX can't do this, because we're not given our bus number
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* (we shouldn't need it) and we can't decompose our tag.
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*/
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/* sanity check. */
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if (pa->pa_bus != PPB_BUSINFO_PRIMARY(data))
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panic("ppbattach: bus in tag (%d) != bus in reg (%d)",
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pa->pa_bus, PPB_BUSINFO_PRIMARY(data));
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#endif
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/*
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* Attach the PCI bus than hangs off of it.
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*/
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pba.pba_busname = "pci";
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pba.pba_bus = sc->sc_s_num;
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pba.pba_maxndevs = PPB_SECONDARY_DEVICES;
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config_found(self, &pa, ppbprint);
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}
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static int
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ppbprint(aux, pnp)
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void *aux;
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char *pnp;
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{
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struct pcibus_attach_args *pba = aux;
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/* only PCIs can attach to PPBs; easy. */
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if (pnp)
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printf("pci at %s", pnp);
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printf(" bus %d", pba->pba_bus);
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return (UNCONF);
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}
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78
sys/dev/pci/ppbreg.h
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78
sys/dev/pci/ppbreg.h
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@ -0,0 +1,78 @@
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/* $NetBSD: ppbreg.h,v 1.1 1996/02/28 01:46:33 cgd Exp $ */
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/*
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* Copyright (c) 1996 Christopher G. Demetriou. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
|
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* must display the following acknowledgement:
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* This product includes software developed by Christopher G. Demetriou
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* for the NetBSD Project.
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* 4. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
|
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
|
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
|
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
|
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* PCI-PCI Bridge chip register definitions and macros.
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* Derived from information found in the ``PCI to PCI Bridge
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* Architecture Specification, Revision 1.0, April 5, 1994.''
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*
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* XXX much is missing.
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*/
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/*
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* Register offsets
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*/
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#define PPB_REG_BASE0 0x10 /* Base Addr Reg. 0 */
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#define PPB_REG_BASE1 0x14 /* Base Addr Reg. 1 */
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#define PPB_REG_BUSINFO 0x18 /* Bus information */
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#define PPB_REG_IOSTATUS 0x1c /* I/O base+lim & sec stat */
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#define PPB_REG_MEM 0x20 /* Memory base/limit */
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#define PPB_REG_PREFMEM 0x24 /* Pref Mem base/limit */
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#define PPB_REG_PREFBASE_HI32 0x28 /* Pref Mem base high bits */
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#define PPB_REG_PREFLIM_HI32 0x2c /* Pref Mem lim high bits */
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#define PPB_REG_IO_HI 0x30 /* I/O base+lim high bits */
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#define PPB_REG_BRIDGECONTROL PCI_INTERRUPT_REG /* bridge control register */
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/*
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* Macros to extract the contents of the "Bus Info" register.
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*/
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#define PPB_BUSINFO_PRIMARY(bir) \
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((bir >> 0) & 0xff)
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#define PPB_BUSINFO_SECONDARY(bir) \
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((bir >> 8) & 0xff)
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#define PPB_BUSINFO_SUBORDINATE(bir) \
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((bir >> 16) & 0xff)
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#define PPB_BUSINFO_SECLAT(bir) \
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((bir >> 24) & 0xff)
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/*
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* Routine to translate between secondary bus interrupt pin/device number and
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* primary bus interrupt pin number.
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*/
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#define PPB_INTERRUPT_SWIZZLE(pin, device) \
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((((pin) + (device) - 1) % 4) + 1)
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/*
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* Max number of devices on a secondary bus.
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* XXX really a "global" PCI constant.
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*/
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#define PPB_SECONDARY_DEVICES 32
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