to enable 64-bit data transfers on 64-bit cards when plugged into
a 64-bit slot. Right know the Asante GigaNIX is listed in that
table.
Sigh, there is an EEPROM bit that can be used to detect 64-bit vs
32-bit cards. Unfortunately, at least 2 vendors of 32-bit cards
fail to clear the "DATA64_EN" bit in the EEPROM, which causes the
card to lose badly, because it still manages to detect that it's
plugged into a 64-bit PCI slot. Yay, stupid hardware vendors.
path: Instead of waiting for the if_snd queue to be drained before
giving ownership of the frist descriptor to the chip, do it after
sync'ing all the descriptors for a single packet.
* Get CFG_M64ADDR, CFG_T64ADDR, and CFG_DATA64_EN from the EEPROM.
Note, we still disable CFG_M64ADDR and CFG_T64ADDR later (XXX need
PCI bus capability flags for these).
* Print a message if we're in a 64-bit slot and 64-bit data is
disabled in the EEPROM. Make sure CFG_DATA64_EN is disabled if
we're not in a 64-bit slot.
- implement SIMPLEQ_REMOVE(head, elm, type, field). whilst it's O(n),
this mirrors the functionality of SLIST_REMOVE() (the other
singly-linked list type) and FreeBSD's STAILQ_REMOVE()
- remove the unnecessary elm arg from SIMPLEQ_REMOVE_HEAD().
this mirrors the functionality of SLIST_REMOVE_HEAD() (the other
singly-linked list type) and FreeBSD's STAILQ_REMOVE_HEAD()
- remove notes about SIMPLEQ not supporting arbitrary element removal
- use SIMPLEQ_FOREACH() instead of home-grown for loops
- use SIMPLEQ_EMPTY() appropriately
- use SIMPLEQ_*() instead of accessing sqh_first,sqh_last,sqe_next directly
- reorder manual page; be consistent about how the types are listed
- other minor cleanups
jumbo frames.
* Work around broken PXE firmware on some boards, which leave the ROM
BAR enabled even after the PXE stack has been unloaded.
* Set up the initial values for sc_tx_fill_thresh, sc_tx_drain_thresh, and
sc_rx_drain_thresh in sip_attach(), rather than in sip_init().
network interfaces. This works by pre-computing the pseudo-header
checksum and caching it, delaying the actual checksum to ip_output()
if the hardware cannot perform the sum for us. In-bound checksums
can either be fully-checked by hardware, or summed up for final
verification by software. This method was modeled after how this
is done in FreeBSD, although the code is significantly different in
most places.
We don't delay checksums for IPv6/TCP, but we do take advantage of the
cached pseudo-header checksum.
Note: hardware-assisted checksumming defaults to "off". It is
enabled with ifconfig(8). See the manual page for details.
Implement hardware-assisted checksumming on the DP83820 Gigabit Ethernet,
3c90xB/3c90xC 10/100 Ethernet, and Alteon Tigon/Tigon2 Gigabit Ethernet.
SIP_EVENT_COUNTERS.
- Decrease SIP_NTXSEGS to 8 and increase SIP_TXQUEUELEN to 256.
This gives us 256 transmit jobs with only twice the descriptor
memory footprint. This prevents stalling transmissions due to
lack of transmit jobs under heavy load.
- Increase SIP_NRXDESC to 128 so we don't run out of receive descriptors
under extreme load.
- As recommended by the manual, leave one descriptor in the transmit ring
with OWN clear to prevent wrap-around.
- Even though the manual claims that driver software must initialize
TXDP if there are no pending transmissions when a new transmission
is to be initialized, doing so causes serious performance degredation
on the DP83820 under heavy load. Not initializing TXDP also increases
performance on the DP83815.
All of this gets us up to ~90Mb/s on both the DP83820 and DP83815 when
connected to a 100base network.
- Set the destination address register properly for "perfect match" mode
in the receive filter setup.
- Do not enable multicast receipt unless we are configured for some multicast.
- Use the "recommended settings" (which set undocumented registers and
documented-as-reserved fields) for the silicon revision 302h (not 203h,
as documented in one of the two places in the manual) because the
documentation is unclear and because those settings fix the card's
behavior in "perfect match" mode. Without those settings, the card
was generating random CRC/invalid symbol errors and generally not
working unless it was set to be promiscuous.
With these changes, this week's version of the Netgear FA311 works for me.
pci_attach_args *" instead of from four separate parameters which in
all cases were extracted from the same "struct pci_attach_args".
This both simplifies the driver api, and allows for alternate PCI
interrupt mapping schemes, such as one using the tables described in
the Intel Multiprocessor Spec which describe interrupt wirings for
devices behind pci-pci bridges based on the device's location rather
the bridge's location.
Tested on alpha and i386; welcome to 1.5Q
Ethernet chip, which is based on the SiS 900 core, but with differences
in the PHY and filter programming interface, and different WoL and
802.3x flow control programming.
This chip appears on new NetGear FA-312TX cards. Thank goodness
they're finally ditching the LiteOn chips.
- Add more delay after reset
- "Big endian mode" on SiS 900 seems broken so don't enable it;
use htole32()/le32toh() instead
- Don't cast u_int16_t array to u_int8_t pointer
- Add some delay() to FILTER_EMIT macro in sip_set_filter()
Now SiS 900 works on my macppc.
thorpej