* On the DP83820, make sure to make the Tx DMA map large enough for
jumbo frames. * Work around broken PXE firmware on some boards, which leave the ROM BAR enabled even after the PXE stack has been unloaded. * Set up the initial values for sc_tx_fill_thresh, sc_tx_drain_thresh, and sc_rx_drain_thresh in sip_attach(), rather than in sip_init().
This commit is contained in:
thorpej
parent
f21c737967
commit
07e108c7dc
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@ -1,4 +1,4 @@
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/* $NetBSD: if_sip.c,v 1.45 2002/02/09 21:04:02 thorpej Exp $ */
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/* $NetBSD: if_sip.c,v 1.46 2002/02/28 19:10:16 thorpej Exp $ */
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/*-
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* Copyright (c) 2001, 2002 The NetBSD Foundation, Inc.
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@ -82,7 +82,7 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: if_sip.c,v 1.45 2002/02/09 21:04:02 thorpej Exp $");
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__KERNEL_RCSID(0, "$NetBSD: if_sip.c,v 1.46 2002/02/28 19:10:16 thorpej Exp $");
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#include "bpfilter.h"
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@ -145,6 +145,12 @@ __KERNEL_RCSID(0, "$NetBSD: if_sip.c,v 1.45 2002/02/09 21:04:02 thorpej Exp $");
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#define SIP_NTXDESC_MASK (SIP_NTXDESC - 1)
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#define SIP_NEXTTX(x) (((x) + 1) & SIP_NTXDESC_MASK)
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#if defined(DP83020)
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#define TX_DMAMAP_SIZE ETHER_MAX_LEN_JUMBO
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#else
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#define TX_DMAMAP_SIZE MCLBYTES
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#endif
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/*
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* Receive descriptor list size. We have one Rx buffer per incoming
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* packet, so this logic is a little simpler.
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@ -588,6 +594,17 @@ SIP_DECL(attach)(struct device *parent, struct device *self, void *aux)
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sc->sc_model = sip;
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/*
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* XXX Work-around broken PXE firmware on some boards.
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*
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* The DP83815 shares an address decoder with the MEM BAR
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* and the ROM BAR. Make sure the ROM BAR is disabled,
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* so that memory mapped access works.
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*/
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pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_MAPREG_ROM,
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pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_MAPREG_ROM) &
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~PCI_MAPREG_ROM_ENABLE);
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/*
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* Map the device.
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*/
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@ -711,7 +728,7 @@ SIP_DECL(attach)(struct device *parent, struct device *self, void *aux)
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* Create the transmit buffer DMA maps.
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*/
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for (i = 0; i < SIP_TXQUEUELEN; i++) {
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if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES,
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if ((error = bus_dmamap_create(sc->sc_dmat, TX_DMAMAP_SIZE,
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SIP_NTXSEGS, MCLBYTES, 0, 0,
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&sc->sc_txsoft[i].txs_dmamap)) != 0) {
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printf("%s: unable to create tx DMA map %d, "
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@ -870,6 +887,40 @@ SIP_DECL(attach)(struct device *parent, struct device *self, void *aux)
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if_attach(ifp);
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ether_ifattach(ifp, enaddr);
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/*
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* The number of bytes that must be available in
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* the Tx FIFO before the bus master can DMA more
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* data into the FIFO.
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*/
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sc->sc_tx_fill_thresh = 64 / 32;
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/*
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* Start at a drain threshold of 512 bytes. We will
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* increase it if a DMA underrun occurs.
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*
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* XXX The minimum value of this variable should be
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* tuned. We may be able to improve performance
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* by starting with a lower value. That, however,
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* may trash the first few outgoing packets if the
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* PCI bus is saturated.
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*/
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sc->sc_tx_drain_thresh = 512 / 32;
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/*
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* Initialize the Rx FIFO drain threshold. We want to start
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* dumping the packet into memory very quickly, especially
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* at Gigabot speeds (the value we use is very aggressive).
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* This is in units of 8 bytes.
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*
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* We should never set this value lower than 2; 14 bytes are
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* required to filter the packet.
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*/
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#if 0
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sc->sc_rx_drain_thresh = 4;
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#else
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sc->sc_rx_drain_thresh = RXCFG_DRTH >> RXCFG_DRTH_SHIFT;
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#endif
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#ifdef SIP_EVENT_COUNTERS
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/*
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* Attach event counters.
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@ -2076,31 +2127,6 @@ SIP_DECL(init)(struct ifnet *ifp)
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*/
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bus_space_write_4(st, sh, SIP_CFG, sc->sc_cfg);
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/*
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* Initialize the transmit fill and drain thresholds if
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* we have never done so.
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*/
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if (sc->sc_tx_fill_thresh == 0) {
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/*
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* XXX This value should be tuned. We may be able to
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* improve performance by increasing it.
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*/
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sc->sc_tx_fill_thresh = 64/32;
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}
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if (sc->sc_tx_drain_thresh == 0) {
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/*
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* Start at a drain threshold of 512 bytes. We will
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* increase it if a DMA underrun occurs.
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*
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* XXX The minimum value of this variable should be
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* tuned. We may be able to improve performance
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* by starting with a lower value. That, however,
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* may trash the first few outgoing packets if the
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* PCI bus is saturated.
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*/
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sc->sc_tx_drain_thresh = 512 / 32;
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}
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/*
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* Initialize the prototype TXCFG register.
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*/
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