bootable GENERAL kernel for the 3 machines.
This is done by integrating the ARM7500 in a better way. In various places
the IOMD ID is checked and action is taken at runtime compared to
compiletime.
The small piece of assembler that is changed now uses the flag
`arm7500_ioc_found' that is set up by iomd.c at startup. When this chip
isnt found at startup it will skip reading the ARM7500 extended IRQ
registers and wont clear them either.
The next step will be getting the mode-definition files to the bootloader.
Currently they are compiled in.
Removed any remnants of soft interrupt dispatching.
Cleaned up a number of comments.
Removed a number of blank lines.
Nuked register keywords.
Made sure code is in sync with interrupt handling for other ARM hardware.
to remove. The address of the pointer rather than the address of what
is pointed to was use to track the previous handler resulting in problems
when releasing a chained irq. (from John Ballance)
- IOMD specific interrupt handling. These files are mainly the old
arch/arm32/irq* files moved here and updated for new iomd device etc.
(revision history maintained).
ends for irq_claim() and irq_release() that will allocate and free
memory for the irqhandler structure.
Added an irqblock array that provides a quick reference to all the
interrupts that should be blocked when a particular interrupt is
received. The irq_claim() and irq_release() functions now update the
irqblock array.
The irq delivery code has been rewritten. On entry to the irq vector the
processor is switched to SVC32 mode so all interrupt routines now run
in SVC32 mode rather than IRQ32 mode. This fixes lots of irq re-enabling
problems.
Interrupt latency times are now vastly improved for high priority interrupts.
Cleaned up calling ast() before returning to USR32 mode (don't need to
mess about with trapframe copying.
Cleaned up all the comments and sorted out their indentation.
Rewritten the soft interrupt delivery code.
Added generic ARM7500 support rather than just RC7500 support.
Fixed the handling of IPL_NONE.
Debugged support for interrupt chaining.
Fill out the intrnames array with the name of the interrupt handler
currently at the head of the chain.
Guarded several sanity checks with #ifdef DIAGNOSTIC.
irq_claim().
Clear the active flag in the irq handler when it is removed from the irq
chain in irq_release().
Checks for podule IRQ's in irq_claim() are now guarded with
#if NPODULEBUS > 0
fiq_release() now retrieves the FIQ more registers and places them
back in the fiq handler structure.
Remove the irq_setmasks() routine. This was coded in assembly months ago
and this C version is now out of date.
Added code for delivering IRQ_SOFTCLOCK.
bjh21