On some modern systems not all devices have the PCI interrupt line
set, typically the cardbus bridge is affected and it would result in
different interrupt vectors used for the same IOAPIC pin.
To allow this, simplify the code by checking for an existing match first
and only allocate a new entry if that doesn't exist. For the IOAPIC case
don't bother with the reserveration on the primary CPU for ISA
interrupts, just use them.
are taken from boot/boot2.c.
This allows an install to be started by running:
load tftp:miniroot.kmod
boot tftp:netbsd-GENERIC
Note that the change to dev_net.c to comment out the network shutdown,
suggests we need to hook the network shutdown in the the common exec code.
If the network is shutdown, it fails to reinitialise and so fails to load
the module.
compiles in GENERIC for i386. This is still a work-in-progress, but
this checkin covers most of the mechanical work (changing signalling
to be able to accomidate SA's process-wide signalling and re-adding
includes of sys/sa.h and savar.h). Subsequent changes will be much
more interesting.
Also, kern_sa.c has received partial cleanup. There's still more
to do, though.
- Ditch the cross-CPU calibration stuff. It didn't work properly, and it's
near impossible to synchronize the CPUs in a running system, because bus
traffic will interfere with any calibration attempt, messing up the
timings.
- Only enable the TSC on CPUs where we are sure it does not drift. If we are
On a known good CPU, give the TSC high timecounter quality, making it the
default.
- When booting CPUs, detect TSC skew and account for it. Most Intel MP
systems have synchronized counters, but that need not be true if the
system has a complicated bus structure. As far as I know, AMD systems
do not have synchronized TSCs and so we need to handle skew.
- While an AP is waiting to be set running, try and make the TSC drift by
entering a reduced power state. If we detect drift, ensure that the TSC
does not get a high timecounter quality. This should not happen and is
only for safety.
- Make cpu_counter() stuff LKM safe.
It wasn't noticed till now as it wasn't overflowing onto anything
important (or was overwritten by the correct data). Recent changes
meant irqstr was placed just before footbridge_intrq and so it trashed
the interrupt linked list, and so caused an alignment fault.
Note that cats still doesn't boot even with the change, as it hangs when
starting userland, I suspect an interrupt issue.
Select the Xen idle routine for Xen, mwait if supported by the CPU and
it is not AMD and halt otherwise. As reported by Christoph Egger,
AMD Barcelona keeps the CPU in C0 state with MWAIT, contrary to HLT,
which uses C1 and therefore much less power.
doing the cmpxchg, where another thread can successfully get a read hold
on the lock. That shouldn't fail anyone trying trying to get a read
hold. So for read locks, never bail just because the CAS fails, only bail
if we the status bits in the lock word say we can't have it.
will stop the countdown timer. The message now reads "Choose an option;
RETURN for default; SPACE to stop countdown." It no longer says what
the default choice actually is, because the message printed on the
following line will do that.
-falign-* that is too zealous for low-memory sh3 machines. I've been
using this for my hpcsh and landisk kernels for a very long time.
(besides, it's not 2001 anymore and pkgsrc/cross/sh is long since gone).
Important note: This does not break backward-compatibility. It is still possible to run on Xen 3.1.4.
Hint for developers: Use the xen_version hypercall to determine at runtime if a new hypercall will work. Also check the hypercall return code.
Tested by me and bouyer. OK bouyer.
Move mixed PRE/POST check in _bus_dmamap_sync under DIAGNOSTIC.
Use __func__ to print function name and wrap long DPRINTF lines
to reduce visual clutter.
