Commit Graph

22757 Commits

Author SHA1 Message Date
scottr
b599d4a3f6 We no longer need 'options GENERIC' 1996-10-15 07:25:55 +00:00
veego
2bf9e9b6e1 Merge rcs 5.7. 1996-10-15 06:59:14 +00:00
scottr
dca6a7e025 Critical fix from Bill Studenmund: if CTS is deasserted and then
immediately reasserted before we get a chance to process the interrupt,
we can inadvertantly get stuck with zs_tx_stopped set.  Move the delta
detection to the hard zs interrupt handler; the softint handler
will notice that something has happened with CTS and restart the
transmitter if it's asserted.
1996-10-15 06:57:43 +00:00
mrg
946732a0cc oops; MFILES definition got lost. (from tls) 1996-10-15 06:50:26 +00:00
scottr
6cd86aa894 BSD -> NetBSD 1996-10-15 06:41:48 +00:00
scottr
f4eeb69eab Several 68040/68LC040-related changes; we're not there yet, but this
brings us closer to basic operation.

  - Verified/updated ROM vector entries for many systems, and new vector
    table entries for LC 520, LC 575/577/578, and Quadra 950
  - Implement a new machine class (MACH_CLASSQ2) for the LC 575 series
  - Use the ptest040() helper function in get_physical().

Also, in straytrap(), only enter the debugger #ifdef DDB.
1996-10-15 06:40:39 +00:00
scottr
31d8d5c176 Implement ptest040(), a helper for get_physical(). 1996-10-15 06:31:07 +00:00
perry
df3c9c2934 Bump revision number to 1.2A so that snapshots of -current will have
decent version numbers in them. This should really, really be in a
single file so in the future it only has to be changed in one place
for all distributions and documentation.
1996-10-15 04:39:33 +00:00
perry
865cba4567 RCS ID Police 1996-10-15 03:57:02 +00:00
perry
725b03db3a RCS ID police 1996-10-15 03:42:50 +00:00
mark
0ecc08d0df Removed loads of old debugging code and special swi codes used during
earlier stages of the NetBSD/arm32 development.
Added support for the architecture defined SWI's. Currently
The IMB and IMB-range architecture defined SWI's for the ARM810 are
currently recognised.
Various comments cleaned up.
1996-10-15 03:08:45 +00:00
mark
cbf4892982 Find the mode with the closest frame rate to the one requested if an
exact match cannot be found rather than picking the lowest frame rate.
1996-10-15 02:33:28 +00:00
mark
a3f71d635a Use arm_fpe_getcontext() and arm_fpe_setcontext() to retrieve the
FP state for process_read_fpregs() and process_write_fpregs().
1996-10-15 02:26:11 +00:00
mark
760efeadb3 The undefined handlers now have a fourth argument which is a fault code.
Catch the user breakpoint instruction and generate a SIGTRAP.
1996-10-15 02:14:21 +00:00
mark
59ffb0612b Merged in latest KGDB changes from Wolfgang Solfrank. 1996-10-15 02:11:31 +00:00
mark
4b88966792 Merged in the KGDB changes to locore.S from Wolfgang.
Added the functions atmoic_set_bit() and atomic_clear_bit() that
can be used for setting and clearings bits atomically (need interrupts
to be turned off).
1996-10-15 02:10:17 +00:00
mark
b24dfb3713 Removed dead kernel stack debugging code from the days when we had
a double mapped stack.
Guard the SVC32 and UND32 mode stack check code with #ifdef
STACKCHECKS.
1996-10-15 02:07:08 +00:00
mark
febe210c2f Call mcount() from bcopy() and memcpy() is GPROF and PROFILE_ASM are
defined.
Replaced references to r14 with lr.
1996-10-15 02:04:40 +00:00
mark
dab3173f56 Not needed as the assembly stub for mcount() is defined in
machine/profile.h
1996-10-15 02:00:47 +00:00
mark
ec238c0c33 The bcopy_page() and bzero_page() functions now call mcount() if
GPROF and PROFILE_ASM are defined.
Register usage has been changed to avoid using r11. This means we have
one less register to save during this function.
1996-10-15 01:52:01 +00:00
mark
8850151b06 Removed file arch/arm32/arm32/scratch.S 1996-10-15 01:45:17 +00:00
mark
083ff3dd3d Dead at last.
The functions in this file are either dead, have been rewritten or have
found proper homes (like fusu.S).
1996-10-15 01:45:04 +00:00
mark
55db7609fb Remove the definition of cdev_uk_init() as this is done in <sys/conf.h> 1996-10-15 01:42:18 +00:00
mark
58e481e13b Call mcount() for all fpe core entry points if GPROF and PROFILE_ASM
are defined.
Switch to SVC32 mode before delivering FP exceptions and switch back
to UND32 mode afterwards before exiting.
1996-10-15 01:37:50 +00:00
mark
ad466c40e1 If CPU_SA110 is define adjust the traceback PC values by 4 as the
StrongARM stores PC+8 on STR and STM instructions rather than PC+12.
1996-10-15 01:33:50 +00:00
mark
24e50982df Report the core identity string now available from the core header when
booting.
After assembling the post FP processing callback branch call
sync_icache() if CPU_SA110 is defined.
Return a valid signal code when raising a SIGFPE exception so
the cause of the SIGFPE can be determined.
Added the functions arm_fpe_getcontext() and arm_fpe_setcontext()
to obtain the FP context in a FPE independant form for the ptrace()
syscall.
1996-10-15 01:31:28 +00:00
mark
407ce69224 Use tlb_flush() rather than tlbflush().
In db_write_text() call sync_caches() after modifing the text area
if CPU_SA110 is defined.
Added a new machine command "frame" to print out a trapframe.
Trap the kernel break point instruction specifically and panic on
any other undefined instruction being executed in SVC mode.
1996-10-15 01:24:48 +00:00
mark
e3c0a41e67 Added machine command to print a trapframe. 1996-10-15 01:23:36 +00:00
mark
804b62c479 Major code clean up.
Removed a load of old debugging code that has served it purpose.
1996-10-15 01:20:48 +00:00
mark
578797208e In the function fetchuserword() call mcount() on function entry if
GPROF and PROFILE_ASM are both defined.
Fixed a bug in suswintr() and susword() that caused the value written
to be trashed.
1996-10-15 01:17:59 +00:00
mark
695e09b29a Added generic support for the ARM7500 cpu rather than just the RC7500
motherboard.
Cleaned up a lot of code to match KNF.
When the device is attach the vidc refclk frequency is reported along
with the amount of video memory and the type.
1996-10-15 01:15:24 +00:00
mark
7d0bc8682c Recognise the ARM32_SYNC_ICACHE option to sysarch() syscall and call
sync_icache() to garentee any instruction cache the CPU may have is
in sync with the data cache and main memory.
1996-10-15 01:12:02 +00:00
mark
7cfe42e258 Overhauled and fixed teh console blanking code. Things no longer
go wrong when console blanking occurs while X is running.
The blanktime ioctl now allows blanking times to be set, force
immediate blanking or diable blanking on a per virtual console basis.
Updated the console version number to revision D.
1996-10-15 01:10:06 +00:00
mark
be9a8e231a Removed the function vidc_col() as this has been guarded with #if 0
for a long time now as the function was replaced with a macro.
1996-10-15 01:05:04 +00:00
mark
ea88364d7f Tidied up the comments.
Call the Debugger from the diagnostic code if userret() finds itself
at an spl level other than SPL_0.
1996-10-15 01:04:27 +00:00
mark
04c5783fb7 Call mcount() on function entry if GPROF and PROFILE_ASM are both defined. 1996-10-15 01:00:29 +00:00
mark
a2a2b693c8 Removed a load on unused code that has been hiding here.
The functions vidcconsolemc_render() and vidcconsolemc_cls()
will call mcount if GPROF and PROFILE_ASM are both defined.
1996-10-15 00:55:26 +00:00
mark
c90d8612e7 General code cnd formatting clean up. 1996-10-15 00:52:21 +00:00
mark
0d48d902ea New build of the ARM FPE core. The core header now has a version
number field and an core identity string pointer.
Labels are now defined for all the entry points in the core header
structure so that the linker can relocate the branches to the core.
The core entry points are now branch instructions relative to the
start of the core so the address of the core function does not have to
be calcuated are call time.
1996-10-15 00:49:10 +00:00
mark
ed4a15bc3d Added prototypes for tlb_flush(), cache_clean(), sync_caches() and
sync_icache().
Removed prototype for memset().
Added prototypes for atomic_set_bit() and atomic_clear_bit().
1996-10-15 00:44:58 +00:00
mark
a6bf04810f Include <machine/fp.h> and <machine/reg.h>
Define the two new fields added to the FPE core header in
the arm_fpe_mod_hdr_t structure.
Added prototypes for arm_fpe_getcontext() and arm_fpe_setcontext().
Updated the prototypes for arm_fpe_core_loadcontext() and
arm_fpe_core_savecontext() to pass a fp_context_frame pointer.
1996-10-15 00:42:46 +00:00
mark
fcc485e573 Define a separate set of irq numbers for ARM7500 machines if RC7500 is
not defined as the ARM7500 in A7000 machines has different interrupt
numbers than the ARM7500 in RC7500 machines.
1996-10-15 00:39:23 +00:00
mark
796814b9e9 Added -Wcomment to the CPPFLAGS.
Added -Wreturn-type to the CWARNFLAGS.
Make dependancies for makemodes.
1996-10-15 00:35:48 +00:00
mark
4d21960d40 Added checks for illegal combinations of CPU_ARM6, CPU_ARM7, CPU_ARM7500,
CPU_SA110 and CPU_LATE_ABORT.
Updated the CLKF_INTR() macro for changes made to the interrupt system.
Updated some of the CPU ID codes.
Added the CPU ID for the ARM8.
1996-10-15 00:33:03 +00:00
mark
7e836e3676 splsoftclock() is now a macro rather than a function. 1996-10-15 00:26:46 +00:00
mark
3f12639e0e Added options EXEC_AOUT and EXEC_SCRIPT. 1996-10-15 00:25:45 +00:00
mark
25d5efdd4f Updated to match reality. 1996-10-15 00:23:51 +00:00
mark
478a722a54 New configuration file for RiscPC's with StrongARM CPUs (SA-110) rather
than an ARM6 or ARM7.
1996-10-15 00:22:58 +00:00
mark
b352e3549b Updated fpreg_t to match changes made to fp.h 1996-10-15 00:21:36 +00:00
mark
f930769a2b New configuration file.
This is for an Acorn A7000 machine with an ARM7500 CPU and no VRAM.
This config should also work for other ARM7500 machines with an
architecture that matches Acorns.
1996-10-15 00:21:06 +00:00