the stack frame when usermode interrupt occurs. The interrupt may have
modified the PC [such as sendsig()]. This got dropped with the stackframe
changes.
and set local variables for MIPSx_PG_V, MIPSx_PG_SHIFT_,
MIPSx_PG_FRAME accordingly.
(defining both MIPS3 and MIPS1 and using pte.h. doesn't yet work in userland.)
version number from /sys/conf/osrelease.sh.
replace MACHINE symbol with _MACH, and define _VER for version number.
fileset names must still be updated by hand; this is a bit harder to
fix unless GNU cpp's -traditional-cpp flag is used.
call for the board's memory space to be PCI_MAPREG_MEM_TYPE_32BIT_1M or
PCI_MAPREG_MEM_TYPE_32BIT depending on the board ID. Also, remove a
bogus extra argument to an interrupt-establishment-error printf. Problems
pointed out by Jarkko Torppa <torppa@cute.fi> in PR 3753, but fixed slightly
differently than he suggested.
(1) fix a printf format (%x to print int, not %lx).
(2) fix probe of 4th chip/16th channel (used to tell whether or not the
board is a 16- or 32-port board) by removing an incorrect offset so
that the code matched its comments. (!!!)
(3) fix storage of chip number in per-channel structure so that it actually
stores the chip number, rather than the chip offset. This allows the
driver to work with more than the first four channels (i.e. with chips
other than chip number 0, which happens to have an offset of zero). (!!!)
Remove old code now that the new version is working.
Correct typo for 16K cache (R4400).
Align the saved AT register location; seems to hang if not aligned on 8
byte boundry.
similar design and code by Jason Thorpe and Jonathan Stone.
NOTE: the kernel-stack-switching code and cacheflush() calls in
locore.S still use #ifdef MIPS3 and need more work.
mips/include/cpu.h:
Add CPUISMIPS3 for run-time tests of what CPU architecture level
we're running on.
mips/include/locore.h:
Add declarations of locore cache-size variables for ref/def toolchain.
mips/include/mips1_pte.h:
mips1 TLB bit definitions.
mips/include/mips3_pte.h:
mips3 TLB bit definitions.
mips/include/pte.h:
define accesor macros for TLB bits (e.g., mips_pg_m_bit(),
that expand to CPU constants if only one CPU arch is configured,
or to inline functions if both MIPS1 and MIPS3 are configured.
mips/mips/locore_r2000.S:
Use MIPS1_PG_xxx constants inside mips1-specific code.
mips/mips/locore_r4000.S:
Use MIPS3_PG_xxx constants inside mips3-specific code.
mips/mips/locore.S:
Use MIPS1_PG_xxx constants inside mips3-specific code.
Use MIPS1_PG_xxx constants inside mips1-specific code.
(Needs more work!)
mips/mips/{pmap.c,vm_machdep.c,trap.c}, pmax/pmax/machdep.c:
Use MIPS3_PG_xxx constants inside mips3-specific functions,
and MIPS1_PG_XXX inside mips1-specific code.
Otherwise, use mips_pg_XXX_bit() macros where they apply,
and use "if (CPUISMIPS3) { ... } else {... }" where they don't.
mips/mips/mips_machdep.c:
Import Michael Hitch's fixes from the pmax locore-init code
into mips_vector_init().
pmax/pmax/machdep.c:
Use generic mips_vector_init() locore vector-init function.
christos