- No more distinction between i/o-mapped and memory-mapped
devices. It's all "bus space" now, and space tags
differentiate the space with finer grain than the
bus chipset tag.
- Add memory barrier methods.
- Implement space alloc/free methods.
- Implement region read/write methods (like memcpy to/from
bus space).
This interface provides a better abstraction for dealing with
machine-independent chipset drivers.
a char *, because that's what was really intended, and because
if the print function modifies the string, various things could become
unhappy (so the string should _not_ be modified).
(soon to be documented on mailing lists; eventually in section 9 manual
pages), most importantly:
(1) support interrupt pin swizzling on non-i386 systems with
PCI-PCI bridges (per PPB spec; done, but meaningless, on i386).
(2) provide pci_{io,mem}_find(), to determine what I/O or memory
space is described by a given PCI configuration space
mapping register.
(3) provide pci_intr_map(), pci_intr_string(), and
pci_intr_{,dis}establish() to manipulate and print info about
PCI interrupts.
(4) make pci functions take as an argument a machine-dependent
cookie, to allow more flexibility in implementation.
- split softc size and match/attach out from cfdriver into
a new struct cfattach.
- new "attach" directive for files.*. May specify the name of
the cfattach structure, so that devices may be easily attached
to parents with different autoconfiguration semantics.
pcibus and pci.
(2) remove the #ifdef i386 from pci.c, and provide a machine-dependent
hook (pci_md_attach_hook()) to do any machine-dependent attachment
gunk, e.g. on the i386 printing out the configuration mode (if bus 0)
(3) don't pass max device number for a given bus in, use
PCI_MAX_DEVICE_NUMBER, which can be defined on a per-machine basis.
(defaults to 32. on i386, it's 32 if pci conf mode == 1, 16 if 2.)
and attach the secondary pci bus as a 'pci' device. Note that this support
is incomplete and will not yet work for ports other than that i386. (The
i386 can rely on the PCI interrupt 'line' information to determine
interrupt mapping, which is not necessarily possible on other systems.)
