clock rate for this board on Alpha/PCI systems. Under x86/PCI, the
board f/w will correctly tell you "I'm running at 60Mhz", so the code
that preserved that across a board reset (which would drop the chip
back to 40Mhz) worked fine. On the 8200, the chip was saying "I'm 40Mhz"-
which wasn't true. This turned out to be okay as long as you didn't have
any FAST or UltraFast targets- In fact, setting the chip to 40Mhz allowed
you to run up to 8Mhz SCSI. Unfortunately you die bigtime on the devices
that go faster than that. The fix here is to only use what the chip tells
you the clock rate is in the cases you don't really know (sbus is the
only case where this could be different, although with 66Mhz PCI coming up,
this may change).
* clarify how a utmp record is deleted upon logout.
* clarify the format of a wtmp record appended at logout (from
Geoff Wing <mason@primenet.com.au> in [misc/3196]
* cpuregs.h:
rename remaining VMMACH_xxx TLB macros to MIPS_TLB_xxx.
Add compile-time MIPS3-only, compile-time MIPS1-only, and
runtime (both) definitions for number of TLB ASIDs (tlb pids)
and shift count to extract a TLB pid.
* locore.h:
Delete unused vector slot for indexed TLB writes.
mips1 and mips3 TLBs are different enough that we have
to break them out at the caller anyway.
* Add compile-time MIPS3-only andcompile-time MIPS1-only
macros to call locore functions directly by name.
Use the existing method table only if
* mips/mips_machdep.c, mips/trap.c, mips/pmap.c, pmax/machdep.c:
Use MIPS3_ or MIPS1_ specific names for TLB pids in
mips3 and mips1 specific code paths (e.g., creating the kernel stack
for process 0).
Add `options MIPS3' to pmax/conf/GENERIC.
jonathan