exceptions, which puts the address of the instruction we faulted
on in a different location. Copy it and handle as we normally would,
restoring the saved PC before returning.
The FPE should probably be reworked to take advantage of the 68LC040's
precalculated effective address, at some point.
to signal that the build is happening on a machine with an ELF
toolchain. This is temporary, until a better toolchain-recognition
scheme is worked out.
- Only pass user trace traps and breakpoints on to trap().
Gets rid of some hair in the trace/breakpoint trap cases.
- Before entering the debugger, switch to a temporary
stack so that the debugger can alter the stack pointer.
- Add glue for KGDB (still not complete).
Some other minor cleanup:
- Protect against some bad pointer derefs.
- Be more a little more verbose when a fatal trap
occurs to aid debugging.
- Only pass user trace traps and breakpoints on to trap().
- Before entering the debugger, switch to a temporary
stack so that the debugger can alter the stack pointer.
- Add glue for KGDB (still not complete).
Clearly mark the MMU enable trampoline code.
the keyboard to work. Fixes a bug where booting with `-d' worked
only on systems using a serial console.
While I'm here, eliminate some redundancy in the ite console intialization
code.
This fixes a critical bug where a clock interrupt would happen sometime
between the call to hp300_calibrate_delay() and when proc0 is initialized.
This ends up dereferencing a bad pointer in itimerdecr(), which scribbles
over the first page of kernel text, specifically vectors 46 and 47 (decimal).
To complicate matters, the way the bug manifested itself was different
depending on whether or not DDB was configured into the kernel. When
DDB is in the kernel, kernel text is mapped read/write. When DDB is not
in the kernel, kernel text is mapped read-only. Note that the kernel
scribble happens early, typically before the console is initialized.
In the non-DDB case, the kernel will hang as soon as it's loaded because
the access causes a fault (before the console is initialized, so you
don't see the trap).
In the DDB case, the access does _not_ cause a fault. However, the
mechanism used to enter the kernel debugger is to issue a "trap #15".
Conveniently, this is one of the corrupted vectors (47), thus rendering
DDB useless (it actually caused a recursive panic/trap loop).
This _WILL_ be in the first 1.2 official patch.
include files containing model-specific I/O device configuration.
Add more options and devices (ccd, LKM, etc), as appropriate for
documentation and as examples in a "template" GENERIC config file,
even though not all of these work completely yet.
- This driver supports the on-board mbus-based cgfourteen (sometimes referred
to as "SX") video hardware present on SS20-class machines.
- It does *not* support any of the SX acceleration features.
- It does support the 8-bit mode of the hardware, and looks to X like
a cgthree.
- It does support the cg6-style hardware cursor, even when running X in
cgthree emulation.
- It does support DPMS power-down of compatible displays on later-revision
cg14's.
- There is code to support the true color (32-bit) mode of the cg14 as
cg8 emulation, but it is disabled by default because it is most likely
broken. #define CG14_CG8 to turn it on.
The driver is not yet installed in the conf files, but I will do so
shortly...
Check only the IR bit of the CIAA Interrupt Control Register when testing
for a level 6 interrupt. An interrupt only occurs if IR is set, and IR is
only set if the individual mask bits are set. The individual interrupt
status bits can be set without causing an interrupt if the corresponding
enable bits are not set.
from arch/mips/mips/locore.S to arch/pmax/pmax/locore_machdep.S.
* Move ARC-specific locore code (vmstat -i counters) to
arch/pica/pica/locore_machdep.S.
* When the mips3 locore support is known to work, both ports can now use
arch/mips/mips/locore.S.
wrappers for:
gets.c getenv.c strcat.c strcpy.c
so they compile again (if _KERNEL is defined).
For bootblock space reasons it would be prereable to call the PROM entrypoints
directly, via the macro wappers in de_prom.h, rather than C function wrappers.
* Create arch/mips/Makefile.inc with source list of generic MIPS-cpu
files for tags
* Use mips/Makefile.inc and updated tag list in pmax/Makefile
* Try building bootblocks in arch/pmax/stand.
clock_attach() time (for now).
This removes our dependance on the DraCo ROM access timing and frees
the second CIA on Amigas.
b) support for DraCo rev. >= 4 native timer chips.
for a level 6 interrupt. An interrupt only occurs if IR is set, and IR is
only set if the individual mask bits are set. The individual interrupt
status bits can be set without causing an interrupt if the corresponding
enable bits are not set.
