Commit Graph

25 Commits

Author SHA1 Message Date
drochner 46289e1fef Phase out the use of a string as first "attach args" member to control
which bustype should be attached with a specific call to config_found()
(from a "mainbus" or a bus bridge).
Do it for isa/eisa/mca and pci/agp for now. These buses all attach to
an mi interface attribute "isabus", "eisabus" etc., and the autoconf
framework now allows to specify an interface attribute on config_found()
and config_search(), which limits the search of matching config data
to these which attach to that specific attribute.
So we basically have to call config_found_ia(..., "foobus", ...) where
such a bus is attached.
As a consequence, where a "mainbus" or alike also attaches other
devices (eg CPUs) which do not attach to a specific attribute yet,
we need at least pass an attribute name (different from "foobus") so
that the foo bus is not found at these places. This made some minor
changes necessary which are not obviously related to the mentioned buses.
2004-08-30 15:05:15 +00:00
lukem 6fdfc66c57 add __KERNEL_RCSID() 2003-07-14 22:57:46 +00:00
fvdl 7dd7f8baa2 Handle 64bit DMA addresses on PCI for platforms that can (currently only
enabled on amd64). Add a dmat64 field to various PCI attach structures,
and pass it down where needed. Implement a simple new function called
pci_dma64_available(pa) to test if 64bit DMA addresses may be used.
This returns 1 iff _PCI_HAVE_DMA64 is defined in <machine/pci_machdep.h>,
and there is more than 4G of memory.
2003-06-15 23:08:53 +00:00
thorpej 41a403fb33 Use aprint_normal() for cfprint() routines. 2003-01-01 00:35:30 +00:00
thorpej 47c14a34bc Fix script-o's in last. 2002-10-02 03:36:20 +00:00
thorpej 5a9ddc1422 Use CFATTACH_DECL(). 2002-10-02 02:21:20 +00:00
thorpej 9a711d6985 Declare all cfattach structures const. 2002-09-27 20:29:02 +00:00
thorpej 6c88de3b53 Introduce a new routine, config_match(), which invokes the
cfattach->ca_match function in behalf of the caller.  Use it
rather than invoking cfattach->ca_match directly.
2002-09-27 03:17:40 +00:00
thorpej d1ad2ac4f2 Rather than referencing the cfdriver directly in the cfdata entries,
instead use a string naming the driver.  The cfdriver is then looked
up in a list which is built at run-time.
2002-09-27 02:24:06 +00:00
thorpej 204183c0fa * Add "pcitag_t *pba_bridgetag" to pci_attach_args. This is set to
NULL for root PCI busses.  For busses behind a bridge, it points to
  a persistent copy of the bridge's pcitag_t.  This can be very useful
  for machine-dependent PCI bus enumeration code.
* Implement a machine-dependent pci_enumerate_bus() for sparc64 which
  uses OFW device nodes to enumerate the bus.  When a PCI bus that is
  behind a bridge is attached, pci_attach_hook() allocates a new PCI
  chipset tag for the new bus and sets it's "curnode" to the OFW node
  of the bridge.  This is used as a starting point when enumerating
  that bus.  Root busses get the OFW node of the host bridge (psycho).
* Garbage-collect "ofpci" and "ofppb" from the sparc64 port.
2002-05-16 01:01:28 +00:00
thorpej 9841593fe5 Fix a typo. 2002-01-02 14:48:09 +00:00
thorpej 636e9cd08b Add a "cacheline_size" argument to pci_configure_bus(). It is used
to set the cacheline size in the BHLC register.  This should be the
size of the largest D-cache line on a system.
2001-11-28 23:48:34 +00:00
thorpej b1ec255377 Add a "firstbus" argument to pci_configure_bus(), indicating the
first bus number to use, rather than always assuming that we should
start at bus #0.
2001-11-09 19:29:12 +00:00
simonb e1f5fbd944 Fix a tyop in a comment. 2001-10-20 13:47:09 +00:00
thorpej f5e6f05c1a If PCI_NETBSD_ENABLE_IDE is set, enable the PIIX{3,4} southbridge
IDE channels on the P-5064 and P-6032, since PMON doesn't do it
for us (thus causing the `pciide' driver to ignore them).
2001-08-22 00:40:38 +00:00
thorpej 498641fc7e Print more BONITO rev. info. 2001-06-25 20:15:57 +00:00
thorpej 0c37c9e860 Check in work-in-progress of P-6032 support. This is not tested,
but is meant for back-up purposes.
2001-06-22 06:02:54 +00:00
thorpej e4ce5f4268 A P-6032 will never have a V3 PBC -- don't include its option header. 2001-06-22 03:45:24 +00:00
thorpej e51a043945 Yet more interrupt cleanup -- the platform mater interrupt establish
function now just takes an "irq", which is an index into the irqmap
table for that platform.
2001-06-15 04:01:39 +00:00
thorpej fe87c9aade When the old PCI address map is in use, disable I/O space. Also disable
I/O space on PBC revs < B2.
2001-06-14 18:52:26 +00:00
thorpej 80dfaa3e5a Read the PCI memory space base and the PCI DMA window base from the
V3 PBC, and use them in the bus mem tag and the bus dma tag on the
P-4032.  This allows us to get much further when PMON has configured
the PBC using the old-style PCI address map.
2001-06-14 17:57:26 +00:00
thorpej 1930cfd7dc Correct for a data structure change. 2001-06-10 06:17:15 +00:00
thorpej ce66bf0803 Rewrite the interrupt handling code:
- Compute the number of CPU pipeline cycles per second using the
  mc146818.
- Use the COMPARE interrupt for the hardclock interrupt.
- Collapse all interrupt priorities into a single priority, and use
  the CPU interrupt inputs to determine the interrupt source (local
  device, PCI device, ISA device, etc.)

This allows us to have interrupt sharing.
2001-06-10 05:26:58 +00:00
thorpej 71cb790fb5 Add support for the Algorithmics P-4032 board. This is totally
untested, since I have no P-4032 board, but it's no worse than
the current situation, which is "totally non-working P-4032
support in the ARC port, of all places".
2001-06-01 16:00:03 +00:00
thorpej 16b9c60621 A port to the Algorithmics MIPS evaluation boards. We currently
support the P-5064, which has a QED RM5xxx CPU soldered on.

There is some skeletal support for the P-4032 (an older board, which
had an R4xxx CPU).  There are some placeholders for the P-6032, which
is their newest board, but no real code yet (the P-6032 has a different
PCI controller, the Algorithmics BONITO).

There are still some (apprently softintr-related) problems with the
algor kernel, but it works well-enough to self-host.

Kudos to Allegro Networks for loaning me a P-5064 board on which to do
the port.
2001-05-28 16:22:13 +00:00