was sent to developers, but will eventually become a man page or
something), i noticed a few in various names:
(1) _map and _alloc should take a flags argument, rather than a
'cacheable' boolean.
(2) BUS_BARRIER_* flags should be BUS_SPACE_BARRIER_*.
(3) bus_space_copy_* should be bus_space_copy_region_* for consistency
with other region ops.
Fix all of these (in a backward-compatible way, at least for now). Redefine
internal usees of those names to use the new names. Also, while at it,
clean up the copy functions (remove unnecessary variables) and make sure
that they and other functions conform to the spec.
don't assume that the names/values to be put into defines in assym.h
start with the first .ascii in the assembler file; look for the array
start symbol, instead.
by implementing entirely in assembly. This saves some 6 bytes on all MPUs,
and about 8 cycles on the 030.
Now that it's optimized, define spltty() in terms of _splraise() so that
we don't inadvertantly lower the SPL.
Has unrolled loop for aligned-to-aligned copy.
Notes:
1. this code tuned for DEC 5000/200. ioasic decstations do more unaligned
copies. Better than old non-unrolled loop, but could be improved.
2. Undoes changes made for MIPS3 with comment implying an r4000 TLB bug.
We can't reproduce this on 5000/150 (jonathan) or 5000/50 (mhitch).
Calls to previous bcopy with a bad address show similar symptoms,
reporting a trap in bcopy() after bcopy() has returned. Same thing??
Needs re-checking on an r4000 with no L2 cache.
* Move clockvar.h (header file for generic clock code) to sys/dev/dec.
* Move if_le_dec.c with DEC padded LANCE-dma (pmax/pmax, ioasic, vax 3400)
to sys/dev/dec. Remove from sys/dev/tc.
* Declare attribute le_dec_subr in /sys/dev/dec/files.dec,
use if_le_dec.c when it's defined.
* Move IOCTL asic declaration from pmax and Alpha MD machine
files to sys/dev/tc/files.tc.
* move TurboChannel and ioasic if_le attachments from pmax and Alpha machine
config files to /sys/dev/tc/files.tc. Add le_dec_subr attribute.
* Add if_le_dec attribute to if_le_ibus (pmax ds3100 pmax) LANCE attachment.
sigcode():
executed from user-space stack.
mips1_cpu_switch_resume, mips3_cpu_switch_resume:
arguments passed in via v0, t0, t1 (outlined from cpu_switch())
mips3_VCED(), mips3_VCEI():
called from exception-vector code without any register save,
$at, $ra are live.
- don't erase FPSR exception bits _after_ doing most of the operations in
fpu_implode(), erase them before doing arith and store operations. This fixes
losing the DZ bit.
- create FPSR_OVFL and FPSR_UNFL bits in fpu_implode(). This showed up when
the first error was fixed.
XXX some more work needs to be done. E.g., creating OPERR together with
OVFL looks bogus, but I'm too tired know to re-check docs; and at least we
pass our own regression tests know.
cgd