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aa53aca844
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38496 Commits

Author SHA1 Message Date
pk
aa53aca844 Turn __CPU_SIMPLE_LOCK_INLINE into !__CPU_SIMPLE_LOCK_NOINLINE, so we don't 
screw up user land.
 2004-04-20 08:48:03 +00:00
pk
e2cab98f9e Always provide the __cpu_simple_lock() entry point (for LKMs). 2004-04-20 08:38:41 +00:00
pk
ce78973db2 Provide a fast trap path for AST IPIs. 2004-04-20 08:36:46 +00:00
pk
3097bbf440 pmap_extract4m: We can read a spurious invalid pte if the system is in 
the middle of the PTE update protocol. So, if at first we get an invalid
PTE, retry with the demap lock held.
 2004-04-19 15:20:42 +00:00
wiz
3f9411f688 Spell removable with only two es. Inspired by jmc@openbsd. 2004-04-19 12:44:09 +00:00
pk
2e643fb9ae __cpu_simple_lock() isn't a pure function. 2004-04-19 12:41:53 +00:00
pk
a484ad4f3f CMP_PTE_USER_READ4M: drop instruction that's effectively a no-op. 2004-04-19 10:01:41 +00:00
pk
fecb3b619b Drop spurious variable. 2004-04-19 08:50:21 +00:00
matt
e3aa635a37 Fix tpyo. 2004-04-18 23:32:46 +00:00
matt
62fc149c0b Make this compile with XNS enabled 2004-04-18 23:32:21 +00:00
matt
0f0d66d66e Add entry for netns/ns_cksum.c 2004-04-18 23:31:45 +00:00
pk
03a07196d9 srmmu_vcache_flush_page/range: cover the case where we're called during 
bootstrap before the cache parameters are setup.
 2004-04-18 21:49:09 +00:00
pk
27f928584a Code srmmu_vcache_flush_range & srmmu_vcache_flush_page more efficiently. 2004-04-18 20:46:39 +00:00
pk
57bbd955d1 Various ft_srmmu_vcache_*() functions: use `branch on greater (unsigned)' 
instead of `branch on positive'.
 2004-04-18 20:44:39 +00:00
pk
68f30ee7af Make inlining __cpu_simple_lock() optional. Add a version with a built-in 
spin out counter that panics with a diagnostic.
 2004-04-18 19:20:09 +00:00
fvdl
07fd2b039b Adapt for new aapic.c location. 2004-04-18 18:36:56 +00:00
fvdl
9ad68fe184 Moved here from arch/amd64/pci 2004-04-18 18:34:22 +00:00
fvdl
9a03155b3f Move these files to x86, so that the i386 port can use them too 
(for booting i386 kernels on amd64 machines).
 2004-04-18 18:33:33 +00:00
pk
38bdc6fab2 Remove the cache_flush() trampoline; it's no longer directly cross-called. 
Instead, implement the MP parts in terms of cross-callable vcache_flush_range()
function.
 2004-04-17 23:45:40 +00:00
pk
66a6704d83 Update fast xcall interrupt event counter. 
ft_srmmu_vcache_flush_range: adjust length for address alignment
 2004-04-17 23:28:44 +00:00
cl
c705011fd6 Loader which allows booting NetBSD as domain0 guest OS. 2004-04-17 23:20:37 +00:00
pk
e68993f7e4 Add EV_COUNT. 2004-04-17 22:36:54 +00:00
pk
3c3af40e65 Add xcall event counters. 2004-04-17 22:34:14 +00:00
cl
17292d12b3 use nanoseconds since boot counter for delay routine 2004-04-17 21:49:55 +00:00
cl
9a39f88e1e add block device driver 2004-04-17 12:56:26 +00:00
cl
e688fd0596 sync with arch/i386/i386/pmap.c: 
1.172/yamt
- keep cr3 register and its copy in TSS synchronized.
- defer LDTR loading as well as cr3.
 2004-04-17 12:53:27 +00:00
cl
1cfcb16460 - microtime support 
- don't report cpu speed in startrtclock()
 2004-04-17 12:50:45 +00:00
cl
e22637e9aa report cpu speed correctly 2004-04-17 12:47:38 +00:00
cl
8bde79bdaa - fix event dispatching for event 0 
- use struct trapframe instead of struct pt_regs
 2004-04-17 12:46:42 +00:00
pk
89f5c8768c When acknowledging a sun4m soft interrupt, read back the pending interrupts 
hw register to make sure it gets through on Ross CPUs.
 2004-04-17 11:55:06 +00:00
pk
1e5ff8a716 raise_ipi: don't bother fetching the cpu type from memory in order to 
avoid one instruction.
 2004-04-17 11:50:23 +00:00
pk
727a9ca138 The macro CMP_PTE_USER_READ4M now needs to consider more PTE access 
rights combinations, since the access rights table in pmap has changed.
 2004-04-17 11:26:36 +00:00
pk
66178209d2 Use fast cross calls for MP cache flush ops. 2004-04-17 10:13:13 +00:00
pk
f714ca590d Add CPUINFO_XMSG_* symbols for use in fast xcall handlers. 2004-04-17 10:07:58 +00:00
pk
ebfb6e3b0a Implement fast trap handlers for TLB and cache flushes. 2004-04-17 10:06:29 +00:00
pk
901271fbc8 Use a fast cross call for TLB flushes. 2004-04-17 10:04:20 +00:00
pk
4eac0385f6 xcallintr: arg3 is gone. 2004-04-17 10:01:55 +00:00
pk
8bc2760490 Add support for fast cross call handlers that execute in the trap window 
on the destination CPU. The `fast handler' address takes the place of the
unused fourth argument to xcall().
 2004-04-17 10:01:11 +00:00
matt
8cd24529dc Add a SAVE/DISCARD flag to save_{fpu,vec}_lwp. Use it appropriately. 
Nuke struct fpu and use struct fpreg instead (except for the names, they
were identical).  On MP machines, this will avoid an unneeded IPI to save
the register contents that are about to discarded.
 2004-04-16 23:58:08 +00:00
fvdl
7a44f0ad1f Make tracing work better (through interrupts, etc). Essentially a synch 
with i386.
 2004-04-16 14:21:56 +00:00
hannken
3dc578de5e Make it compile when PPC_HAVE_FPU is not defined. 2004-04-16 08:52:41 +00:00
matt
ee00feaab9 Revamp how user MSR/SRR1 are dealt with. 
Add a PSL_USEROK_P(psl) macro which valids the bits (replaces the use of
PSL_USERSTATIC).
Add a PSL_USERSRR1 mask which is used to mask out status bits in the upper
half of SRR1.
Make sure PSL_VEC is set appropriately in userret().  PSL_VEC is in the same
region as SSR1 status bits so it's not preserved on exceptions.  Thus we
need to make to set it.
When returning a MSR/SRR1 to userland, always clear the status bits.
Add emulation of the mfpvr, mtmsr, and mfmsr instructions.
 2004-04-15 21:07:06 +00:00
he
a1182cdd25 We need to also clean out athhal-elf-o, so that "make clean; make" 
after an initial "make" will also (re)build athhal-elf.o.
 2004-04-15 15:02:17 +00:00
tv
7d5e6e5d58 Move -mips2 to CPUFLAGS in each kernel config file as suggested by mrg. 
This matches the way other ports specify default CPU codegen options.
 2004-04-15 14:58:30 +00:00
mrg
47a36b2bdc when we have a P4 or a MP system, don't enable performance monitoring. 
this fixes PR#25014.  i386 GENERIC can re-enable PERFCTRS by default now
(it was disabled with x86 SMP support was commited to the trunk.)

XXX:  should add P4 support
XXX:  should add MP support
 2004-04-15 13:56:32 +00:00
aymeric
8f2774036c . add a missing call to lockinit() in apmattach() 
. while here, explicitly initialize three softc variables to 0
 2004-04-15 11:03:15 +00:00
pk
299dfa38bf De-__P(). 2004-04-15 10:07:32 +00:00
pk
dab35b2e8d xcall: increase spin-out; fix diag output. 2004-04-15 08:11:20 +00:00
pooka
88d0b8e68e Return "video()" instead of "graphics(0)" for a graphics console, 
since that's what even our code expects.

suggested by Steve Rumble
 2004-04-14 10:29:26 +00:00
bsh
018ab5b974 distinguish PXA255/26x from PXA2[15]0 in CPU attach message 2004-04-14 04:01:49 +00:00