Commit Graph

629 Commits

Author SHA1 Message Date
kent cd7d9faeaf Introduce BUS_DMA_NOCACHE, and bus_dmamem_map() of i386 supports it. 2003-01-28 01:07:51 +00:00
pk 53c776f062 Add functions to set & get the interrupt target CPU. 2003-01-22 21:58:28 +00:00
thorpej c464d72f40 Merge the nathanw_sa branch. 2003-01-18 06:44:56 +00:00
pk c454f450b1 Define a MP version of callrom(). 2003-01-16 16:58:52 +00:00
pk 72c28f7bb7 Rename the current mp_{pause,resume}_cpus() => mp_{pause,resume}_cpus_ddb().
Implement mp_pause_cpus/mp_resume_cpus on top of the PROM services.
2003-01-16 16:57:43 +00:00
pk 72286d4202 Definitions of some OBP generated CPU mailbox messages. 2003-01-16 14:43:07 +00:00
pk c8226e1ce0 Define spllowerschedclock().
To be used in the same spirit as spllowersoftclock().
2003-01-14 22:58:00 +00:00
pk d45f77c6c8 Add CLKF_LOPRI() macro that allows a (timer) interrupt handler to determine
whether it is interrupting code running at a given IPL level.
2003-01-14 22:54:53 +00:00
pk 2684c88122 fpulock: encapsulate required IPL raise in the FPU LOCK/UNLOCK macros. 2003-01-12 16:29:00 +00:00
pk 55a3bd0a85 schedcpu() has been fixed; now we can notify another CPU about a pending
reschedule request.
2003-01-12 01:50:51 +00:00
pk c41718e9ec Remove needless indirection from the curproc() macro. 2003-01-12 01:19:00 +00:00
mrg 90d9434890 keep track of which cpu's have run a pmap and only broadcast tlb flushes to
cpu's who have done so.  implement pmap_deactivate() for MULTIPROCESSOR and
call it from cpu_switch() when we are about to switch proces and when we
enter idle().

with this change, i see significantly reduced tlb IPI traffic and fork/exec
bound processes -- such as "configure" -- run significantly faster, upto
15%.  i also obvserved a small (0-2%) benefit to CPU bound tasks as well.
2003-01-11 03:40:31 +00:00
pk 30cc38bdb5 Replace `want_resched' and `want_ast' globals by per-CPU variables. 2003-01-10 16:34:14 +00:00
thorpej b346ea724a Merge sparc and sparc64 <machine/signal.h>. 2003-01-09 23:25:24 +00:00
pk 02d686d112 Simplify ddb register storage setup: remove MULTIPROCESSOR special cases
and keep the ddb register copies on the current stack always.
2003-01-07 16:03:03 +00:00
pk 469014c2cd * Maintain a pointer to the cpu_info structure of the CPU being examined.
* Force cpu_Debugger() to have a stack frame, so tracing can at least
  start off matching arguments and function calls correctly.
2003-01-07 15:15:06 +00:00
pk 0a66c7efe5 Protect FPU context switching with its own lock. 2003-01-06 18:32:31 +00:00
pk 67998a8646 Move schedintr() to clock.c and initialise schedhz in initclocks(), so
these are available to all timer implementations.
2003-01-06 12:50:43 +00:00
mrg fb1500c7e1 remove dead extern fpproc/foundfpu declarations. 2003-01-03 16:21:05 +00:00
pk ff451161e2 Finish FPU context switching on SMP systems. 2003-01-03 15:12:02 +00:00
martin 87a073002c Make the *_stream_* methods always use the *_real accessors.
Define __BUS_SPACE_HAS_STREAM_METHODS.
2003-01-03 13:23:39 +00:00
mrg 7bd617d237 part one of bus_space(9) fixes to enable bus spaces to override the
bus_space_{read,write}_[1248]() functions, which will allow 16-bit
PCMCIA support to work without additional hacks in MI drivers.
this option is not enabled yet.
2003-01-03 11:57:45 +00:00
pk 67e16e38a4 Define IPL_SCHED at level 11 and make splsched() use it. 2002-12-31 15:51:18 +00:00
pk a1e9e5cae8 Add some more definitions: SRMMU and MXCC reset register. 2002-12-31 12:01:27 +00:00
pk f953a01835 xcallintr() receive a `clockframe *' argument, not a `trapframe *'.
Setup a DDB context for paused CPUs by defining a soft trap (T_DBPAUSE)
which uses the generic trap handler code to get the trapframe constructed
and then calls on a debugger-defined `suspend' routine.
2002-12-23 00:55:16 +00:00
pk 0408b1cbc8 tlb_flush_segment() and tlb_flush_region() now take a virtual address
argument instead of segment and region numbers.
2002-12-21 12:52:55 +00:00
pk b036b089a7 Multiple inclusion protection. 2002-12-16 16:24:40 +00:00
thorpej e8cc3884de Rename __LDPGSZ to AOUT_LDPGSZ, to accurately reflect what it is. 2002-12-10 17:14:02 +00:00
pk 725a6aebf7 Remove the `flags' argument from bus_intr_establish(). 2002-12-10 13:44:47 +00:00
pk 5446e96bac bus_intr_establish() now takes an optional `fast trap' handler argument.
BUS_INTR_ESTABLISH_FASTTRAP and BUS_INTR_ESTABLISH_SOFTINTR are no longer used.
2002-12-10 12:16:25 +00:00
pk 4f62e0f7c8 * intr_establish() now takes an optional `fast trap' routine argument.
* also remove __P().
2002-12-10 12:04:51 +00:00
thorpej 78ea2dd367 Use __LDPGSZ (which must be == USRTEXT) as the text address for a.out
executables, and eliminate the USRTEXT constant, which was only used
by the a.out exec code.
2002-12-10 05:14:24 +00:00
pk 04e582df1b setsoftint() is no longer used. 2002-12-09 16:13:58 +00:00
pk c822c6bd84 Finish the switch to the softintr(9) framework.
To make this work, we now have to use separate handler lists for hardware
and software interrupts as the soft interrupt handlers do not return
an `interrupt handled' status.

Thanks to Matt Fredette for providing an initial set of patches on port-sparc.
2002-12-09 16:11:50 +00:00
uwe 38b8c5689a Use 0x07ffffff for LOADADDR mask. This still provides for 128MB (and
given that PROM maps just 4 or 16 this is not going to be a bottle
neck).  Doesn't really affect normal kernels, need it for the changed
kernel base address (uncommitted) hack for broken javastation OFW.
Ok by pk.
2002-12-08 14:36:55 +00:00
pk 6c8d3fba22 Use MI versions of {set,rem}runqueue(). 2002-12-07 10:27:03 +00:00
pk 1b719337bb Pass the `device class interrupt level' on to intr_establish() and use to
raise the ipl in the interrupt handlers to the appropriate level. This avoids
interrupt handler interference if one of the devices actually interrupts at
a lower hardware level than the maximum level assined to a device class.

Based on code from Art Grabowski in openbsd.
2002-12-06 16:04:11 +00:00
pk 060fa93542 Start using IPL_* constants from intr.h; phase out PIL_* in psl.h 2002-12-06 15:36:45 +00:00
pk 8d141cba88 Not all sun4m platforms have version 8 sparc CPUs. So go out to the PROM
and get the CPU architecture version from the PROM cpu node `sparc-version'
property.
2002-11-28 15:29:53 +00:00
lukem 0635de35a3 Remove KDIR=, since SYS_INCLUDE=symlinks and KDIR are not supported any more. 2002-11-26 23:30:07 +00:00
pk ec667a0f51 Add `machdep.cpu_arch' sysctl to determine the CPU architecture version.
Currrently, cpu types `sun4' and `sun4c' produce version 7, all others
version 8.
2002-11-26 14:36:10 +00:00
takemura 900b200c92 Moved MI APM definitions into dev/apm. 2002-10-14 02:08:37 +00:00
martin 44a2c6cb31 All sparc64 CPUs do __HAVE_CPU_COUNTER (aka %tick). 2002-10-07 13:26:56 +00:00
simonb 63096043b3 Use "#define\t" instead of "#define ". 2002-09-22 08:30:56 +00:00
chs c081614ea2 it really helps to get the stub right before cutting + pasting it 27 times.
alas, I did not.  doh.
2002-09-22 07:53:39 +00:00
chs 55e1f79335 add pmap_remove_all() hook (empty on most platforms so far). 2002-09-22 07:17:08 +00:00
gmcgarry dca80f08fd Add __HAVE_MD_RUNQUEUE flag for MD code to override MI run queue primitives. 2002-09-22 04:11:32 +00:00
uwe 917eac2212 RCSID should go to .ident section.
While here add __KERNEL_RCSID.
2002-09-17 15:28:28 +00:00
gehenna 77a6b82b27 Merge the gehenna-devsw branch into the trunk.
This merge changes the device switch tables from static array to
dynamically generated by config(8).

- All device switches is defined as a constant structure in device drivers.

- The new grammer ``device-major'' is introduced to ``files''.

	device-major <prefix> char <num> [block <num>] [<rules>]

- All device major numbers must be listed up in port dependent majors.<arch>
  by using this grammer.

- Added the new naming convention.
  The name of the device switch must be <prefix>_[bc]devsw for auto-generation
  of device switch tables.

- The backward compatibility of loading block/character device
  switch by LKM framework is broken. This is necessary to convert
  from block/character device major to device name in runtime and vice versa.

- The restriction to assign device major by LKM is completely removed.
  We don't need to reserve LKM entries for dynamic loading of device switch.

- In compile time, device major numbers list is packed into the kernel and
  the LKM framework will refer it to assign device major number dynamically.
2002-09-06 13:18:43 +00:00
thorpej c9dafdb84c Increase the default stack limit to 2M (from 512K on sparc and 1M
on sparc64).
2002-09-03 16:24:35 +00:00