Excise unnecessary instructions from kernel launch code.
Increase HIMEM on >8Mb machines, since the last two changes didn't free
enough memory to boot with 16Mb.
arm32/arm32/machdep.c into arm/arm/sig_machdep.c, merging and ANSIfying in
the process.
The code is based on the arm32 version, so I don't think anything should break
there.
Also, most device functions related to IRQ handling no longer take a device
pointer. We make so many assumptions about the machine's layout in irq.c that
this just seemed silly.
The architecture here follows that of the vax port -- each device has its
evcnt in its softc, but defers actually incrementing it to the IRQ
dispatcher. This way, devices can attach sub-counts (e.g. Rx and Tx counts
for Ethernet interfaces), but don't all have to have code to increment the
counters.
Drivers deliberately call evcnt_attach_dynamic() before establishing their
interrupt handler so that the establish routine can attach a parent event if
that's appropriate. At present, it isn't.
The architecture here follows that of the vax port -- each device has its
evcnt in its softc, but defers actually incrementing it to the IRQ
dispatcher. This way, devices can attach sub-counts (e.g. Rx and Tx counts
for Ethernet interfaces), but don't all have to have code to increment the
counters.
Drivers deliberately call evcnt_attach_dynamic() before establishing their
interrupt handler so that the establish routine can attach a parent event if
that's appropriate. At present, it isn't.
NULL "name" argument to irq_establish indicates that the device will maintain
an evcnt structure for this interrupt. In this case, irq_establish will still
maintain its own count (for DDB machine irqstat), but won't attach it to the
global list.
Change use of ev_group and ev_name to follow guidelines in evcnt(9).
Switch arckbd(4) over to the new arrangements.
This adds support for EtherExpress/16 cards with 16k of RAM, and in the
process adds general support for PIO mode on these cards. This entails
changing the way the i82586 driver handles bus barriers, since it doesn't
allow for strange cases like this.
This has been tested on the i386 port with the 'ix' driver in both
16KB (which was the source of the problem) and 32KB modes, as well
as with the 'ef' driver. I've tested it (briefly) with 'ei' on arm26
as well. In theory, drivers other than 'ix' should follow precisely the
same code paths as before.
and link it directly to db_command_table[] so that it's not necessary
to do this at runtime. Make db_machine_command_table[] const on all ports.
g/c now unneded stuff, like db_machine_commands_install(), db_machine_init()
Patch written by enami.
shape as the old arm32 one, but there are a few #defines to keep arm26 code
happy. Anything that depends on the precise shape of the trapframe,
and especially on being able to treat it as an array of registers, has been
updated.
Yes, this causes binary incompatibility. Yes, it's Evil, Bad and Wrong.
Nonetheless, I think it's probably the least unpleasant way to get close to
binary compatibility with NetBSD/arm32, and a very much doubt there are any
arm26 binaries out there that depend on the old shape of struct sigcontext.
and place the definition in <machine/types.h>. This can now be used
as a flag to indicate whether or not <machine/intr.h> can be included
to get the generic soft interrupt API.
arm32/arm32/in_cksum_arm32.c -> arm/arm/in_cksum_arm.c
Also move specification of other checksum stuff to files.arm, even though we
use the MI code for that.
- Make data_abort_address() return the whole affected range, rather than
just one end.
- Don't rely on pmap_confess(). Instead, for LDM/STM, behave as if two faults
had occurred, one at each end of the range.
- Separate out fault handling into do_fault(), and call it from
data_abort_handler() (twice) and prefetch_abort_handler().
1: Cleanup of syscall() -- treat the arguments as an array of register_t
throughout. This saves a few casts, and generally makes seeing what's
going on easier.
2: Be a little more careful in the handling of data aborts on kernel
addresses: don't use the kernel's map unless the access was actually from
a kernel mode. This is how the arm32 data abort handler behaves.
- Use UVMHIST for debugging messages, rather than printf
- Rely on the caller of pmap_enter to tell us how to manipulate referenced/
modified bits in the kernel pmap.
[ Suggested by chs -- may need work on the rest of the kernel. ]
- Split third-stage initialisation out of pmap_create() into pmap_init2().
- Bug fix: when relocating pv_table, fix up all references to it as well.
- Bug fix: in pv_release(), if pulling up a pv_entry to the head of the
list, correct the reference from its pmap.
just get pmap_fault to shove them back in. Crude, but effective. Fix inspired
by Chuck Silvers.
This breaks pmap_confess, but it probably deserves to die.
XXX if you have libc after citrus locale import, please recompile libc,
and your applications that use mbstate_t (rather rare). really sorry
for the mess.
only signal handler array sharable between threads
move other random signal stuff from struct proc to struct sigctx
This addresses kern/10981 by Matthew Orgass.
By default, they aren't used, since most cards seem to put the non-OS-dependent
stuff in the main chunk directory. i-cubed cards are a notable exception.
Issue Service_PreReset to get the hardware to a sane state.
Use *ShutDown to log off fileservers.
Use the correct arguments to Cache_Control.
Using Service_PreReset seems to have rendered the Podule_ReadID trick
unnecessary, so g/c it.
start of the kernel text segment in at address 0 to get zero-page properly
mapped. This should save us one page, but that may need a bit of extra
shuffling before we can easily tell UVM about it.
packets. Interrupt enabling is left to the RISC OS driver, medium selection
is untested and it's hard-wired to the MAC address of my card. Not really
for production use.
the command line, so we don't need to tokenize it first.
This makes it less than clear what file type BBBB should have, so let's not
make an issue of it.
rather than assigning to the whole field, set or clear individual flags,
which implies that the B_BUSY and B_INVAL flags will remain set.
this allows us to make the assertion in brelse() that B_BUSY is set,
which is the purpose of all this.
the UPC driver needs to know whether the system's got an IOEB in it.
The way this is implemented is a mess -- I need to get my mind round
autoconfiguration again.
maps standard boot flags to corresponding RB_* values
use BOOT_FLAG() in port's MD code as appropriate
as discussed on tech-kern, add new boot flags -v, -q for booting
verbosely or quietly, and corresponding AB_VERBOSE/AB_QUIET
boot flags; also add FreeBSD-compatible bootverbose macro and
NetBSD-specific bootquiet macro
for hpcmips, use new bootverbose instead of it's own hpcmips_verbose
Tested on i386, and to limited extend (compile of affected files) also for
mvme68k, hp300, luna68k, sun3.
* All of pmap_init is now deferred to the first call of pmap_create. This
allows us to allocate stuff dynamically using malloc.
* pv_table (which is needed before malloc is available) is temporarily
allocated using pmap_steal_memory in pmap_bootstrap, and then
re-allocated using malloc in pmap_create, with the old allocation being
given back to UVM. This should save some memory on small machines, but
the malloc overhead probably soaks it up.
and a front-end driver for the Ether3. Only semantic change is to remove
ea_claimirq() and ea_releaseirq() on the grounds that the seem too spurious
to warrant a callback to the front-end.
routine. Works similarly fto pmap_prefer(), but allows callers
to specify a minimum power-of-two alignment of the region.
How we ever got along without this for so long is beyond me.
in the non-MULTIPROCESSOR case (LOCKDEBUG requires it). Scheduler
lock is held upon entry to mi_switch() and cpu_switch(), and
cpu_switch() releases the lock before returning.
Largely from Bill Sommerfeld, with some minor bug fixes and
machine-dependent code hacking from me.
as used on later arm26 system (A5000, A4, A3010, A3020, A4000).
What we have got:
...
upc0 at iobus0 base 0x010000: config state bb 87 1c 00 00
fdc at upc0 offset 0x3f4 not configured
wdc0 at upc0 offset 0x1f0
lpt0 at upc0 offset 0x278
com0 at upc0 offset 0x3f8: ns8250 or ns16450, no fifo
...
What we haven't got:
- FDC support (found, but not configured).
- Clearing lpt interrupts on arm26 systems (needs help from IOEB).
- A upc(4) manual page.
- More than minimal testing (my A3020s don't have root devices).
- A proper probe routine (arm26 can't use one anyway).
