Commit Graph

31491 Commits

Author SHA1 Message Date
thorpej 9cbd451a98 Revert revision 1.20. 2002-05-03 17:55:55 +00:00
thorpej 510cbd8934 Revert revision 1.3. 2002-05-03 17:52:17 +00:00
thorpej 9b846773b6 Revert revision 1.20. 2002-05-03 17:51:10 +00:00
thorpej c66b5e6e38 Revert revision 1.23. 2002-05-03 17:50:19 +00:00
rjs 6812acf29c Remove CPU_SA110 option. 2002-05-03 16:50:51 +00:00
rjs 94bb29decc Add correct use of cpu types for SA1100 and SA1110. 2002-05-03 16:46:52 +00:00
rjs 767d5585e0 Use processor specific versions of ARM cache control functions for SA1100
and SA1110 instead of using SA110 ones.

Rename common StrongARM functions from sa110_* to sa1_*.

Reviewed by Jason Thorpe.
2002-05-03 16:45:21 +00:00
lukem b933e511b1 nuke installboot.old / bootxx combo (the old "primary bootstrap with
hardcoded blocks of secondary bootstrap"); it was only used by the
distrib ustarfs stuff, and that now uses usr/sbin/installboot and ustarboot
2002-05-03 15:36:52 +00:00
rjs 37685e09df Add sa11x0_context_switch and sa11x0_drain_readbuf.
Reviewed by Ben Harris and Jason Thorpe.
2002-05-03 12:43:53 +00:00
takemura 0d9fe6e48c Enabled USB support for MC-R700. 2002-05-03 11:45:04 +00:00
takemura 9582b7c775 Enable USB support for MC-R700. 2002-05-03 11:37:48 +00:00
takemura f8cb4c37a0 Fixed debug print. 2002-05-03 07:31:23 +00:00
thorpej b8e4c037bd De-obfuscate somewhat; define and use register bit constants, etc. 2002-05-03 04:42:08 +00:00
rafal 13c470a169 R4600 and R5000 count registers count at half-cpu-speed as well. 2002-05-03 03:50:11 +00:00
simonb 13bc33a766 Fix off-by-one error in delay(). Fix from Charles Hannum in ARM code,
pointed out by Rafal Boni.
2002-05-03 03:36:51 +00:00
thorpej 2a46fa85a8 Update for recent changes to the ARM pmap. From Hiroyuki Bessho,
PR 16617.
2002-05-03 03:32:54 +00:00
thorpej 860fe83065 Add support for the Intel PXA210 and PXA250. From Hiroyuki Bessho, PR 16617. 2002-05-03 03:28:48 +00:00
thorpej 5573190305 Add the CPU_XSCALE_PXA2X0 option. From Hiroyuki Bessho, PR 16617. 2002-05-03 02:43:19 +00:00
rafal 4cebb807c9 Cosmetic change. 2002-05-03 01:51:38 +00:00
rafal 2eece4af5f Update copyright dates. 2002-05-03 01:49:21 +00:00
thorpej 46a3731866 Move the CPU/clock/memory-related options to std.dreamcast, since
they are constant across all Dreamcast systems.
2002-05-03 01:36:02 +00:00
rafal c92f3647a4 Fix up clock interrupt accounting for the sgimips port -- make sure
to schedule clock interrupts at a fixed interval, rather scheduling
the next one based on the time of the arrival/servicing of the previous
clock interrupt.  Also, pick up a trick from the sbmips port to convert
a division in ip22_clkread to a multiplication, since those are much
cheaper -- the details of that are described in Simon's commit (see
Message-Id: <20020306073437.1D2A8B004@cvs.netbsd.org>).  Thanks to
Jason Thorpe and Dominic Sweetman's "See MIPS Run" (where I found
mention of this very subject while looking for something totally un-
related! 8-) for the clue about the source of the timekeeping problems.

For the IP32, where we have no clock-calibration code yet, use the CPU
frequency provided by ARCS instead; it beats a hard-coded value!

As an added bonus, most of the CPU-clock related stuff is now collected
together in cpu_info_store, rather than as a collection of unorganized
global variables.
2002-05-03 01:13:54 +00:00
eeh be9ab3e5db Provide _LP64 definition if we are generating LP64 binaries. 2002-05-03 00:06:55 +00:00
rjs 9646735a82 Enable CPU_CLASS_SA1 for SA1100 and SA1110. 2002-05-02 22:57:36 +00:00
rjs 2aae453976 Make it compile when VERBOSE_ARM32 is defined. 2002-05-02 22:47:09 +00:00
mycroft 47c99ba59e Fix off-by-one error in delay(). 2002-05-02 22:01:46 +00:00
rafal ab8f2fbc01 Add interrupt counter for Seeq interrupts; also, make sure to reset back to
"recieve only my frames & broadcasts" and clear the ALLMULTI flag if we have
no multicast addresses in our list.
2002-05-02 20:31:19 +00:00
rafal 1a73d72d3b If we handle multiple events from the zs chip in one interrupt, don't count
that as multiple interrupts.
2002-05-02 20:26:49 +00:00
wiz 851d26f9a9 Make sure the machine symlink is there in the dependall step. 2002-05-02 18:54:32 +00:00
wiz aa4109feb4 Add machine symlink to CLEANFILES. 2002-05-02 18:35:02 +00:00
wiz 8015e58333 Since loadfile_machdep.h isn't installed anymore, link the mmeye include
directory into ${.OBJDIR} and find the header file there.
2002-05-02 18:30:46 +00:00
rafal e65d64e370 Since we don't have code to drive the L2 cache on R4600/R5k processors,
disable the L2 cache so at least things work (albeit more slowly) on
the SC versions of those chips.  Tested on a R4600 Indy and a R4400
Challenge S.
2002-05-02 18:00:40 +00:00
wiz f7a47b635a Remove #ifdef RC7500 defines. 2002-05-02 17:25:31 +00:00
thorpej efb8222642 Fix error reporting in the bus_dmamap_load_mbuf() routines. 2002-05-02 16:50:39 +00:00
kleink ba482b3950 * On the 601, obliterate all BAT entries when returning from kernel to
userlevel; this is necessary due to the 601, unlike other 6xx, having
  no concept of separated Valid_user vs. Valid_supervisor for BATs.
* When crossing the kernel/userlevel boundary, have platform-provided
  hooks set up the two fixed BAT entries, and possibly additional
  segment registers to redeem the 601's BAT limitations.

Both of the above are only built if the $MACHINE provides these hooks,
sparing others the pain.
2002-05-02 16:47:49 +00:00
uch 4499275017 remove obsolete header file (shbvar.h) 2002-05-02 16:34:57 +00:00
thorpej b094ff415f Change the semantics of mbuf external storage "ext_free" routines
so that they're more useful for arbitrary types of external storage:

* Add an "mbuf *" argument to (*ext_free)().  If non-NULL, (*ext_free)()
  is expected to free the mbuf itself.  This allows (*ext_free)() to use
  the mbuf for bookkeeping (e.g. deferring the work to a helper thread).
  If the "mbuf *" argument is NULL, we are assumed to be in a context
  which is safe for performing the destructor operation *now*.
* Adjust MEXTREMOVE() and MFREE() routines for above change.
* Update "ade" and "ti" drivers for new semantics.
2002-05-02 16:22:43 +00:00
thorpej 74e2ee8d5c Define __NO_STRICT_ALIGNMENT. 2002-05-02 16:11:28 +00:00
nonaka ed9081de2a Added IBM Personal Power Series 830 IDE controller support. 2002-05-02 15:17:56 +00:00
nonaka 2ff13751ce Use PLATFORM_* 2002-05-02 14:58:36 +00:00
nonaka b9fc6ff617 rename reset_ibm_generic() -> reset_prep_generic(). 2002-05-02 14:48:27 +00:00
nonaka b5a1a9284b Added dump residual data routine. 2002-05-02 14:44:17 +00:00
nonaka 925a022a1d use ext_intr_ivr, too. 2002-05-02 14:38:41 +00:00
nonaka c79479ac8d Added dump residual data routine. 2002-05-02 14:36:42 +00:00
martin 9b693d4bca Remove a local declaration shadowing the global "int statint", thus
preventing the latter to be initialized properly.

Patch from adam@lebsack.com in PR 16608.
2002-05-02 13:01:45 +00:00
thorpej d105d4c056 Move call to sched_unlock_idle to later in the context switch to
eliminate a race where another processor could grab the outgoing
process before we were done saving our state into it, with predictable
results.

Bug spotted on i386 by Frank van der Linden <fvdl@wasabisystems.com>.
2002-04-30 16:05:13 +00:00
tsutsui 8b87191ece Add _rtt(), which is called by panic() in libsa/panic.c,
which is useed from ustarfs.c.
2002-04-30 13:10:56 +00:00
tsutsui 68d3a4f0ee Add ustarfs ops. 2002-04-30 13:09:05 +00:00
tsutsui 2d9bb7f94e Add getchar(). 2002-04-30 13:08:01 +00:00
ragge 96d4c35119 Don't try to probe for dz11 on 4000/90, may corrupt the flash rom (?).
Suggested by Hugh Graham <hugh@openbsd.org>.
2002-04-30 12:33:32 +00:00