the target still is in MSG OUT phase. We still send a message (a NO_OP)
in this case and the chip will remove ATN at the appropriate time.
Using the RSTATN command here induces a "illegal command" in some
chip revisions.
This situation only occurs if the target rejects a previous (multi-byte)
message early (by switching to MESSAGE IN and sending a MESSAGE REJECT)
before the chip has completed the entire MSG OUT transfer. ATN will
remain asserted, and the target returns to MESSAGE OUT phase.
* Account for the events above when reporting "DMA not completed"
diagnostic messages.
* Stream-line the selection code a bit, and make the DMA setup code
more like the MSG OUT & DATA XFER setup.
- Fall back on i/o space if mem space isn't available.
- Card reports mem space as prefetchable, but mapping the card into dense
space fails in nasty ways on the Alpha. Force mapping into sparse
space by clearing the BUS_SPACE_MAP_CACHEABLE bit (XXX!).
fix 'cd' driver's NCD_SCSI bogosity (was using testing wrong macro!)
clean up in various ways:
* make common atapi_mode_{sense,select}() functions.
* put ATAPI data structures in more sensible headers, split up by
device type.
* include headers a bit more carefully.
* pass flags to attachment-specific cd functions, and use them.
* get rid of SCSI bits in scsipi_base.h's scsipi_make_xs(), move
them into the correct place in scsi_base.c.
* fix minor typo in struct name in scsipiconf.h (which was apparently
never used except in a #define later in the same file).
* use __attribute__ to force 4-byte alignment for xs command store,
so that architectures trying to bus_space_write_multi_N() (where
N > 1) that data to a controller won't lose.
* clean up a few comments in typos, and make a few #defines easier to
understand/maintain.
* rename cd_link.h to cdvar.h (via repository copy). This is exactly
what a 'var' file is supposed to be.
* Fix bug in wdc that would overflow ATAPI transfer length.
* Improve wdc probe code so that 'wdc' is probed in if present
even if there are no drives attached, and so that it works
properly even if the only device is an ATAPI slave.
* bus_space-ify.
* split the ISA attachment from the wdc driver, and remove
ISA dependencies from non-ISA files.
* claim that wd and wdc are now machine-independent (probably not
completely true, but mostly so; they at least work on arm32 and
i386).
* Various other minor fixups and cleanups, some of which were pointed
out by Kazuki Sakamoto.
now lives in dev/ic, wd now lives in dev/ata. there's now a 'ata'
interface attribute defined in conf/files, but wdc can't go there
yet because some ports still use private versions based on the old
ISA version.
- "out of resource" errors cause receive buffer chain corruption
- resets can confuse the interrupt handler
- multi-cast setup causes receive buffer chain corruption
- shared memory setup incomplete
* Enhance effiency by avoiding unnecessary shared memory access,
improved handling of receive frame & buffer descriptors, and
introducing an `asynchronous' option when issuing 82586 commands.
* Exclusively use offsets relative to the bus handle representing the shared
memory area to formulate accesses to the chip's data-structures. The
front-ends provide glue functions that cater to the chip's endian-
sensitivity, to perform the actual device access (note: single-byte
accesses are done here using `bus_space_{read,write}_1()').
This concludes the transformation into a bus-independent driver module.
* Abolish C structures to access chip data-structures; instead use macros
that take indices and offsets relative to the bus handle representing
the chip's resources.
* Include the old version of this file wholesale, until all drivers
have been updated to use the MI 82586 code.
thorpej