49784e4bd0
Merge the nathanw_sa branch.
2003-01-18 06:33:41 +00:00
f91b0bb3f2
Merge the nathanw_sa branch.
2003-01-18 06:23:28 +00:00
71b2230367
Merge the nathanw_sa branch.
2003-01-18 06:05:42 +00:00
a50e3bc1cb
Merge the nathanw_sa branch.
2003-01-17 22:58:53 +00:00
23bc250391
Merge the nathanw_sa branch.
2003-01-17 21:55:23 +00:00
4d7731a177
cpu_switch:
...
* return `switched to same process' only if that process was actually
already on a run queue when we entered.
* skip the switch to the idle stack if we can switch immediately
* .. and because of this, don't release the scheduler lock until after
we've fully switched to the new process's stack.
2003-01-17 14:49:45 +00:00
d352e8ce9c
pmap_deactivate(): only update the pmap's cpuset if need to.
2003-01-17 14:15:17 +00:00
f843b3302c
Fix compile failure.
2003-01-17 13:27:56 +00:00
0a4b06a4b4
Fix bus_space_mmap() bug.
...
> Module Name: src
> Committed By: augustss
> Date: Sun Jan 12 23:46:12 UTC 2003
>
> Modified Files:
> src/sys/arch/pmppc/pmppc: bus_space.c
>
>Log Message:
>The bus_space_mmap() returns a physaddr, not a page, on the PPC.
>(This is broken in some (all?) of the PPC ports, it seems.)
2003-01-17 13:19:25 +00:00
b2e8253950
Zero out the TX buffer when padding packet to ETHER_MIN_LEN-ETHER_CRC_LEN.
2003-01-17 12:40:20 +00:00
1d67b9c75a
Don't grab the kernel lock for system timer interrupts; this mostly prevents
...
stalls in system time processing.
XXX - deal with non-atomic global time variables updates later.
2003-01-17 10:36:19 +00:00
628ec7a152
Compiles and works (tested on my A1200) again
...
XXX scsipi mid layer spews out a few "generic HBA error"s during device probe (no slave device on bus), I don't know how to fix this
XXX This whole thing should die now that we have wdc_amiga
2003-01-17 04:20:38 +00:00
6383ae6ccb
Don't do anything if there are no streaming buffer cache.
2003-01-16 21:55:52 +00:00
2252ed574d
mp_{pause,resume,halt}_cpus(): check for cpus==NULL.
2003-01-16 17:21:43 +00:00
c454f450b1
Define a MP version of callrom().
2003-01-16 16:58:52 +00:00
7d4c3f7430
Remove some accidental garbage.
2003-01-16 16:58:23 +00:00
72c28f7bb7
Rename the current mp_{pause,resume}_cpus() => mp_{pause,resume}_cpus_ddb().
...
Implement mp_pause_cpus/mp_resume_cpus on top of the PROM services.
2003-01-16 16:57:43 +00:00
58b50d0643
Read the CPU mailbox in the level 15 soft interrupt handler and respond
...
to idle and stop requests.
2003-01-16 16:27:48 +00:00
b418a6a59d
Some PROMs get really uneasy if the prom_reboot() function is called
...
after the other CPUs have already return into the PROM through prom_cpustop().
So don't do it; try to halt the other CPUs only when an actual `halt'
is requested.
My guess in this case is that the PROM does not expect its original boot
CPU to call prom_cpustop(0), or possibly treats it as the equivalent of
a prom_halt() which is then called again by some other CPU. In any case,
the result is garbage.
2003-01-16 16:20:20 +00:00
f312ee5f9a
What do you know.. the prom_cpu{stop,idle,resume} function appear to be
...
returning a success/fail flag. For now, use it to be informative.
2003-01-16 16:10:44 +00:00
b8b3ddc479
Add a "kernel_text" label.
...
Pointed out by Andrew Brown.
2003-01-16 15:52:53 +00:00
5e231ddd1c
* Implement mp_halt_cpus()
...
* xcall: use printf_nolog()
2003-01-16 14:49:08 +00:00
72286d4202
Definitions of some OBP generated CPU mailbox messages.
2003-01-16 14:43:07 +00:00
26fa27a910
Fix reboot options handling; now one-letter kernel names can also be booted.
2003-01-16 11:33:21 +00:00
0ccdd339c8
A small LP64 fix.
2003-01-16 09:17:01 +00:00
76fda2e342
Add ISA Floppy (to be consistent with INSTALL).
2003-01-16 07:23:06 +00:00
81d3f59353
Add PLATFORM_IBM_6040
2003-01-16 06:59:19 +00:00
b5be66abcd
Move dump_dtlb back under DDB.
2003-01-16 03:01:23 +00:00
72020abb85
Add platform support for the IBM PPS Model 6040 (E) (aka ThinkPad 820).
2003-01-16 02:18:20 +00:00
c018fbe68d
Tidy up event counter increments a little.
2003-01-16 01:14:17 +00:00
c69f520bc8
Removed unused register map; this info is now passed in with the attach
...
args.
2003-01-16 01:05:39 +00:00
a5cea9e740
On Hypersparc MP machines, we need to flush the TLB after a page cache flush.
...
While the pmap functions take care of properly ordering cache and TLB flushes,
not all TLB flush requests are sent to all CPUs (due to per CPU pmap tracking)
while cache flushes are always broadcast.
XXX: need to investigate pmap tracking for cache flush operation as well.
2003-01-15 22:56:32 +00:00
bcae687139
Zero out the NIC memory when padding packet to ETHER_MIN_LEN-ETHER_CRC_LEN
...
sc->write_mbuf now return len of buffer, including padding.
Tested with a PCI ne2000.
2003-01-15 22:20:03 +00:00
5bb3d93538
srmmu_cache_flush: switch MMU contexts in all places where it matters.
...
(incidentally, this also makes Hypersparc MP machines mostly go).
2003-01-15 16:42:27 +00:00
e2dacd3f22
Small typo and add initialisation for the `bank' counter
2003-01-15 16:29:27 +00:00
7295f9f909
Switch to MI installboot.
2003-01-15 07:25:51 +00:00
a458d9f040
Fix compiler warning induced by last change.
2003-01-15 06:57:12 +00:00
0d8f526f58
fix two bugs in my last pmap rework:
...
- in tlb_flush_all(), don't skip TLB entries with the high bit on,
I was confused about which MMU register it was using. it's also fine
to use the last hardware context.
- in pmap_create(), don't allocate a hardware context for the new pmap.
it's unnecessary, and when this would cause us to recycle all the contexts,
it would result in the current process's context being set to 0
(ie. the kernel's context). the current process could then return to
userspace without going through the context-switch code (and thus without
having a hardware context reallocated). this would lead to user mappings
being entered in the kernel's context later, causing all sorts of trouble.
add some assertions to catch this kind of thing.
2003-01-15 06:15:05 +00:00
c8763685b7
Allow the serial console boot blocks to be built with a specific
...
console speed, and build some of the more common ones.
2003-01-14 23:53:30 +00:00
f6f0dbd011
Stub out LIBCRT0, LIBCRTBEGIN, LIBCRTEND, and LIBC.
2003-01-14 23:51:34 +00:00
9eb63b3b94
statintr: if interrupting code running below IPL_SCHED, call schedintr()
...
directly, saving the overhead of an extra soft interrupt.
2003-01-14 23:00:59 +00:00
c8226e1ce0
Define spllowerschedclock().
...
To be used in the same spirit as spllowersoftclock().
2003-01-14 22:58:00 +00:00
d45f77c6c8
Add CLKF_LOPRI() macro that allows a (timer) interrupt handler to determine
...
whether it is interrupting code running at a given IPL level.
2003-01-14 22:54:53 +00:00
ee7e8274a6
xcall: raise IPL to splsched() to prevent interrupts that take schedlock.
...
Otherwise we have a locking order problem with schedlock and xmsglock.
2003-01-14 17:30:55 +00:00
18cd92ffe3
(Re)initialise the pmap structure fields that are not preserved on the
...
pmap pool cache all in one place.
2003-01-14 13:56:07 +00:00
5692526bb6
Remove duplicate assignment.
2003-01-14 11:13:25 +00:00
d928619394
Add a couple more ServerWorks host bridges that explicitly need IO space
...
enabled.
2003-01-14 10:56:53 +00:00
7b889057b4
Add bktr*, udsbr* and radio* at each;
...
allocate a major number for radio*
2003-01-14 08:40:53 +00:00
28c12bee16
Actually return the number of found PCI interrupt routes in mpacpi_pcircount
...
(doh). From Wolfgang Solfrank.
2003-01-13 21:14:39 +00:00
3075f204fd
As pceb pulls in sio.c and sio_pci.c, is also needs the alpha_shared_intr
...
attribute.
2003-01-13 20:55:14 +00:00
12a30d35ea
Add KGDB (commented out).
2003-01-13 20:48:16 +00:00
cb7fde57d3
Make it compile on MPC6xx. I'm not sure about MPC40x.
2003-01-13 20:29:34 +00:00
5e9e39026f
Add KGDB hooks.
2003-01-13 20:26:44 +00:00
fdac9a76f1
Enable nested interrupts.
2003-01-13 20:26:22 +00:00
b50058b483
Broadcast I-cache flush in the `Unimplemented Flush' trap handler.
2003-01-13 20:00:34 +00:00
b4a1c0f6a0
Reset ddb_cpuinfo when leaving DDB.
2003-01-13 19:44:53 +00:00
167ce8e6d3
Fix stack tracing once again.
...
Also check for trap frame boundaries when fetching the return address.
2003-01-13 19:44:06 +00:00
15c016cd08
When padding frames smaller than ethernet minimum size, make sure we supply
...
a buffer long enouth, with the padding bytes initialised.
Also pad to ETHER_MIN_LEN - ETHER_CRC_LEN, not ETHER_MIN_LEN (padded frames
were 4 bytes too long).
2003-01-13 17:13:10 +00:00
df4b5f766b
Remove UNLOCK_XPMSG() before cpu_halt(); it's not compatible with LOCKDEBUG
...
and it wan't chique in any case.
2003-01-13 16:59:17 +00:00
8d9571d120
remove cpu_hatched, cpu_hatch_sc and cpu_hatchstack. the first can use
...
the cpi->flags, the second is unused and the third is also cpi-idle_u.
2003-01-13 15:50:50 +00:00
5642428f4e
Use print_nolog() from xcall(), to avoid confounding things even further
...
by re-entering the scheduling code to wakeup syslog waiters.
2003-01-13 15:01:16 +00:00
4641d55697
Halt any other CPUs in cpu_reboot().
2003-01-13 01:35:45 +00:00
991c0f3475
Install interrupt handlers properly when in apic mode.
2003-01-13 01:20:58 +00:00
86ae625e2c
Declare nioapics as well.
2003-01-13 01:19:34 +00:00
735022ab70
Fix bus_space_mmap() bug.
2003-01-13 00:21:53 +00:00
e1dd8d6b94
The bus_space_mmap() returns a physaddr, not a page, on the PPC.
...
(This is broken in some (all?) of the PPC ports, it seems.)
2003-01-12 23:46:11 +00:00
a4880cb372
Export the ioapic softc linked list, for the benefit of the mpbios code.
2003-01-12 23:20:17 +00:00
d43937377e
Handle all-apics entries for ioapic interrupts.
2003-01-12 23:19:44 +00:00
2684c88122
fpulock: encapsulate required IPL raise in the FPU LOCK/UNLOCK macros.
2003-01-12 16:29:00 +00:00
24780840a1
Account softintr_common as uvmexp.softs, not uvmexp.intrs.
2003-01-12 06:11:01 +00:00
55a3bd0a85
schedcpu() has been fixed; now we can notify another CPU about a pending
...
reschedule request.
2003-01-12 01:50:51 +00:00
c41718e9ec
Remove needless indirection from the curproc() macro.
2003-01-12 01:19:00 +00:00
ae33d2b4e5
Use per-CPU virtual addresses for pmap_copy_page() & pmap_zero_page().
2003-01-12 01:16:06 +00:00
337a21e08f
Get interrupt swizzling right.
2003-01-12 00:52:45 +00:00
12a9bdbb4f
Add missing ethernets and phys. Update FireWire to current reality.
2003-01-12 00:50:29 +00:00
dab556c2b1
pmap_deactivate(): arguments for sp_tlb_flush() were reversed.
2003-01-12 00:34:52 +00:00
9a5dedeaea
Fix -Wsign-compare and -Wuninitialized warnings.
2003-01-11 16:01:49 +00:00
5db9bf0614
Fix -Wsign-compare warnings.
2003-01-11 16:00:48 +00:00
04afe0c722
Change the bootstrap procedure to avoid temporarily mapping physical memory.
...
Now, on the Amiga, we copy a small piece of code to chip memory and enable the
MMU from here.
On the DraCo, we setup %itt0 so that we shadow physical memory without
touching the page tables and very temporarily. The DraCo's memory layout
guarantees that there is no overlap in this case between physical and
virtual addresses.
This fixes a bug where Amiga's with physical memory at 0x200000 wouldn't boot
kernels >2M in size, and possibly other corner cases.
Joint work with Ilpo Ruotsalainen and Ignatios Souvatzis.
2003-01-11 10:47:08 +00:00
90d9434890
keep track of which cpu's have run a pmap and only broadcast tlb flushes to
...
cpu's who have done so. implement pmap_deactivate() for MULTIPROCESSOR and
call it from cpu_switch() when we are about to switch proces and when we
enter idle().
with this change, i see significantly reduced tlb IPI traffic and fork/exec
bound processes -- such as "configure" -- run significantly faster, upto
15%. i also obvserved a small (0-2%) benefit to CPU bound tasks as well.
2003-01-11 03:40:31 +00:00
30d29f647c
Simplify CRIME rev. calculation (we don't appear to need the low nibble).
2003-01-10 20:39:22 +00:00
e756303d08
expand db_proc_cmd() a little more.
2003-01-10 19:25:12 +00:00
30cc38bdb5
Replace `want_resched' and `want_ast' globals by per-CPU variables.
2003-01-10 16:34:14 +00:00
fc3c2cbc33
Make SYMTAB_SPACE actually work.
2003-01-10 16:18:45 +00:00
9cf4ee5aef
Move the check if ioapics were found outside of ifdef MPBIOS. Set the
...
polarity for the default ISA entries to 'default'.
2003-01-10 15:01:09 +00:00
599d302034
If the polarity wasn't set in the mp config entry associated with the
...
ioapic pin, assume defaults (active low for level triggered, high
for edge triggered).
2003-01-10 14:58:46 +00:00
5c114e8d30
Get rid of some extraneous declarations/comments.
2003-01-10 03:48:40 +00:00
0cc0813590
Add the MIPS3_CONFIG_SE (name taken from Rm52xx manual) bit, which is the
...
external cache enable bit -- this allows software to enable or disable the
(external) L2 cache on the R5k and Rm527x and the (external) L3 cache on
the Rm7k. If the (external) cache is disabled, treat it as if there were
no cache for the purposes of the cache setup code.
Also, update sgimips code to use the new name.
2003-01-10 03:22:48 +00:00
d5afd1c04f
Add major for bktr.
2003-01-10 01:32:55 +00:00
3cef21b0f5
Pass acpi_softc down to mpacpi functions.
2003-01-10 00:45:52 +00:00
14cc29cd5d
Don't make assumptions about PCI bus numbers, carefully find all of
...
them before setting up the interrupt routing tables. This still
assumes that all bus numbers have been configured before this
is called.
2003-01-10 00:44:23 +00:00
b346ea724a
Merge sparc and sparc64 <machine/signal.h>.
2003-01-09 23:25:24 +00:00
70628f1993
clean up db_proc_cmd() output slightly.
2003-01-09 18:00:51 +00:00
18c8de0d93
It's now required to turn off traps in the srmmu cache flush ops in
...
non-MULTIPROCESSOR kernels too.
2003-01-09 12:29:52 +00:00
cbc8b8122d
Check for existing soft interrupts too before trying to install a fast
...
interrupt handler.
2003-01-09 10:27:24 +00:00
ec9ebd1af6
- s/xpmsg11/xpmsg15/
...
- clean up
- no need to reset the msg.tag
2003-01-09 05:55:30 +00:00
7386726570
remove a line accidentally commited in previous.
2003-01-09 05:27:09 +00:00
9b0c7030f5
call splclock() around the FPU_LOCK().
...
XXX: pk suggests we can make the this a sleeping lock.
2003-01-09 04:58:58 +00:00
4a7a63dba9
URL for devids.txt moved.
2003-01-08 23:50:23 +00:00
b2618dcbd8
initialize the dv_unit field of our fake device structure to 0, as done on x68k.
...
This fixes the problem where no grf* console would be found on startup because
they wouldn't match with any parent.
While here, memset() that structure to zero so that we either pass or crash
right away if the MI code changes again. From Leo Weppelman, as done on atari.
2003-01-08 23:41:03 +00:00
f234ea91a2
Remove write_user_windows() from a number of `4m' functions, since we don't
...
switch contexts with traps enabled anymore.
2003-01-08 18:46:28 +00:00
f63279a9b6
Add CPUINFO_WANT_RESCHED and CPUINFO_WANT_AST
2003-01-08 17:49:39 +00:00
87e0907cbb
Avoid external declaration for the dummy `ross_pend' variable.
2003-01-08 17:22:09 +00:00
127392a5b7
Prepare for per-CPU reschedule and AST requests.
2003-01-08 17:19:53 +00:00
d3db019efd
Make pv_uncache() and pv_cacheflush() static functions.
...
Split pv_cacheflush() in sun4/sun4c and sun4m/sun4d versions.
2003-01-08 16:16:46 +00:00
4a291c5614
Fixup serious loading problems (together with the former commit of start.S)
...
major code cleanup esp. types used. Also cleanup up a major BUG that for
some odd reason worked :-/ makes me puzzled. It signifies that there might
be copies around in physical space of the DRAM ??? and thus its function
was motherboard dependent? It must have been old cruft from before the
cleanup of the relocation engine.
2003-01-08 16:10:53 +00:00
34ce26d1fc
From the comment :
...
/*
* The size of the code/data to be moved is not `end - rmbase' but
* `__bss_start__ - rmbase' for the module is loaded into RISC OS
* based on the filesize where as NetBSD doesn't have to include all
* the bss space into the file itself. In some odd cases the
* relocatable module area can be smaller than the module + bss and
* thus bomb out.
*/
2003-01-08 15:29:09 +00:00
5543f31d4d
Fix indendation problem in entry for "pckbc* at acpi?".
2003-01-08 13:41:17 +00:00
864739bdee
DUMMY_NOPS is gone, replace it with an inverted, less confusing option:
...
PIC_DELAY. To be used on very old machines.
2003-01-08 13:20:26 +00:00
f4018cde22
Initialise the secondary CPUs' `spc_runtime'.
2003-01-08 01:20:56 +00:00
61593bd957
Fix a tyop and some grammar.
2003-01-08 00:41:41 +00:00
21c24b2090
Use the MI setrunqueue()/remrunqueue().
2003-01-08 00:00:03 +00:00
c873a9a9a1
Remove leftover debug "mp_verbose = 1" assignment.
2003-01-07 21:11:10 +00:00
013008be77
Wrap mpbios_scanned in the right ifdef.
2003-01-07 20:13:29 +00:00
06b5330bc7
Add MPACPI option (commented out). Add MPBIOS option by default, it is
...
needed now to do MP BIOS MP configuration.
2003-01-07 18:55:36 +00:00
a23660903d
Add code to configure cpus, ioapics and interrupt wiring using ACPI.
...
Shuffle some code around so that this an exist as a method next
to mpbios, both creating the same data structures. If both are
defined, try ACPI first.
2003-01-07 18:54:08 +00:00
d2dfe3f39a
Define acpi_md_callback. It retrieves interrupt routing info if the MP
...
BIOS wasn't already used for that (currently won't happen; ACPI gets
to try first if configured).
2003-01-07 18:52:43 +00:00
501607aeed
Disable ExtINT by default when using I/O APICs.
2003-01-07 18:51:15 +00:00
f33d911ff7
Don't use any cpu_info structures until at least one CPU was attached.
2003-01-07 18:50:13 +00:00
c2ff6d5b83
Add various external declarations to accomodate ACPI MP probing as an
...
alternate method to MPBIOS probing. Move some stuff common to the two
methods into mpconfig.h
2003-01-07 18:48:44 +00:00
88f08d9ac1
- add a new message tag for level15 software NMI, and switch ddb to use this
...
rather than the level13 software intr xpmsg area. now DDB IPI's don't lock
the xpmsg_lock and we avoid recursion and more.
- don't actually use cpuinfo.msg.lock yet, xpmsg_lock suffices.
- reread the pending register on mbus hypersparc cpus to avoid bugs in the
h/w that cause IPI's to be missed.
2003-01-07 16:20:13 +00:00
02d686d112
Simplify ddb register storage setup: remove MULTIPROCESSOR special cases
...
and keep the ddb register copies on the current stack always.
2003-01-07 16:03:03 +00:00
469014c2cd
* Maintain a pointer to the cpu_info structure of the CPU being examined.
...
* Force cpu_Debugger() to have a stack frame, so tracing can at least
start off matching arguments and function calls correctly.
2003-01-07 15:15:06 +00:00
004dd5ecba
#include <sys/kernel.h> for `cold'.
2003-01-07 13:12:59 +00:00
63b5299d1e
Let all CPUs play..
2003-01-07 12:09:00 +00:00
e1dfbff267
xcall: use splclock() to prevent interrupts that want the kernel lock.
2003-01-07 10:57:18 +00:00
141297688f
revert (most of) previous
2003-01-07 10:31:56 +00:00
87d5eedbbb
Delete reference to astpending, which doesn't exist any longer.
2003-01-07 09:57:01 +00:00
c0338e49bf
don't do the xcall() dance on sun4d for the cache flushing, but do make
...
sure we're only doing one flush at a time...
2003-01-07 05:57:37 +00:00
4d08051d29
*soren* remember <SPACE><TAB> in config files :-)
...
Space-Tab-ify ACPI examples.
2003-01-07 03:19:38 +00:00
295b9d4d25
fake up a dv_cfdriver entry before calling config_search().
...
config_search() does not do the lookup for us anymore.
2003-01-07 00:13:19 +00:00
cb83efc9b8
Fix miscelanious small errors that arose from having non Mb aligned memory
...
for the videoscreen.
2003-01-06 22:46:36 +00:00
1035faff1d
writable, not writeable.
2003-01-06 20:30:28 +00:00
0a66c7efe5
Protect FPU context switching with its own lock.
2003-01-06 18:32:31 +00:00
7cffe83841
Small fixes that showed up during boot-testing of a Pace DSL4000 running
...
the RISC OS-STB 4.0.0 version of RISC OS.
2003-01-06 18:22:00 +00:00
4bb41ae2f2
Rework how KERNOBJDIR functions; now it's always determined with
...
cd ${KERNSRCDIR}/${KERNARCHDIR}/compile && ${PRINTOBJDIR}
This is far simpler than the previous system, and more robust with
objdirs built via BSDOBJDIR.
The previous method of finding KERNOBJDIR when using BSDOBJDIR by
referencing _SRC_TOP_OBJ_ from another directory was extremely
fragile due to the depth first tree walk by <bsd.subdir.mk>, and
the caching of _SRC_TOP_OBJ_ (with MAKEOVERRIDES) which would be
empty on the *first* pass to create fresh objdirs.
This change requires adding sys/arch/*/compile/Makefile to create
the objdir in that directory, and descending into arch/*/compile
from arch/*/Makefile. Remove the now-unnecessary .keep_me files
whilst here.
Per lengthy discussion with Andrew Brown.
2003-01-06 17:40:18 +00:00
3630c2d8c4
Remove loadfile_machdep.h from being installed
2003-01-06 17:00:12 +00:00
675149a358
- md_fpumid = -1 => md_fpu = NULL, in some #ifdef FPU_DEBUG code
...
- only call KERNEL_PROC_UNLOCK() if we called KERNEL_PROC_LOCK() originally.
2003-01-06 14:16:10 +00:00
c053751628
compatibility, not compatiblity.
2003-01-06 13:26:24 +00:00
4824190751
transmission, not transmition.
2003-01-06 13:17:01 +00:00
c6f1277bfa
synchronous, not syncronous.
2003-01-06 13:10:25 +00:00
7e681f7063
interrupt with two rs.
2003-01-06 13:04:54 +00:00
67998a8646
Move schedintr() to clock.c and initialise schedhz in initclocks(), so
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these are available to all timer implementations.
2003-01-06 12:50:43 +00:00
45ad5c9584
successful with only one l.
2003-01-06 12:46:05 +00:00
5e442fbbdd
specified, not specifed.
2003-01-06 12:38:47 +00:00
5a91827c81
through, not throught.
2003-01-06 12:29:48 +00:00
9a9c991837
Fix SP tlb_flush_{ctx,all} macros.
2003-01-06 12:10:46 +00:00
9a3f5034cf
No more opms on i386.
2003-01-06 11:31:39 +00:00
b892fa21e2
There's no cache_r5k.h yet, so don't try to include it.
2003-01-06 06:25:32 +00:00
0098f248ba
PCI fixup code for the O2. Tested with a range of 32 and 64-bit network
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cards, but not much else. Seems to work fairly well, though.
2003-01-06 06:21:11 +00:00
c21021e6fb
Improve the interrupt code somewhat by having callers of xxx_intr_establish
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pass in an interrupt handle (which is currently to the CRIME interrupt the
device is attached to) so the interrupt handlers know which device was the
one looking for attention.
While here, fix up PCI interrupt routing for both the on-board devices and
the PCI slots -- even though there is only one PCI slot in the chasis, the
hardware can accomodate up to three and provides an interrupt mapping for
all the PCI interrupt pins for both the internal SCSI & PCI slot and the
two "extra" slots.
2003-01-06 06:19:40 +00:00
b0e9963d23
Don't shift the pending interrupt bitmask passed to crime_intr() so it can
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associate pending interrupts with the proper sources. Add some comments to
the vestigal ip32_intr_establish() on what it really *should* do.
2003-01-06 05:59:34 +00:00
1e74cf4267
Postpone DDB/KGDB init until we know the machine type, so the debugger can
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be attached to the right place, twiddle the right watchdog registers, etc.
2003-01-06 05:56:00 +00:00
340ca7145e
We have version 3.02 now : just a small fix for bootkernel name guessing.
2003-01-06 02:54:03 +00:00
52b083a154
Add symbolic names for MSR's used by SYSENTER/EXIT.
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(I was experimenting a while back, might as well commit this one file..)
2003-01-05 22:47:13 +00:00
a731ae7dc4
add ACPIVERBOSE [commented out]
2003-01-05 22:31:13 +00:00
65c6c82f48
Document all known ACPI devices and options (disabled by default).
2003-01-05 21:44:32 +00:00
9df7616ed3
Combine the various sun4m/sun4d TLB flush routines into a hand-coded
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assembler version.
2003-01-05 19:38:42 +00:00
c0142e4ded
Print the cpu number in many pmapdebug-controlled debug traces.
2003-01-05 19:31:12 +00:00
113229a2cb
trap(T_FPE): reset the `p_md.md_fpu' when preempting the FPU.
2003-01-05 19:26:17 +00:00
6e51b83bf3
Add mlx. Pointed out by Daniel Eggert in PR 18487.
2003-01-05 19:21:44 +00:00
cfbbdd3ae0
Fixed threshold value for Vrc4173 PIU.
2003-01-05 08:41:54 +00:00
1106d42424
On the IBM 4xx, don't enter DDB on user mode traps. Fixes
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port-powerpc/19662.
Some minor cleanup while here.
2003-01-04 23:46:11 +00:00
0d588a6b61
Add options MIIVERBOSE.
2003-01-04 21:09:31 +00:00
3e2e9af6c9
Grab the kernel lock on interrupts at level IPL_CLOCK and lower.
2003-01-04 19:25:36 +00:00
5e73320f0f
Re-arrange the fields in struct cpu_info such that the most heavily used ones
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are together, to reduce cache stomping.
2003-01-04 18:54:45 +00:00
4f162f46b9
Make this compile without DDB.
2003-01-04 18:14:48 +00:00
296dfde575
Remove KERNFS silliness.
2003-01-04 18:14:22 +00:00
c72ac1fcf2
Don't fail the kernel build if dbsym fails.
2003-01-04 18:13:51 +00:00
c1acc622c0
Check chip type first in mbe_g2_detect() to reduce unexpected device access
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in mbe_g2_match() when the device does not exist.
2003-01-04 18:10:18 +00:00
62a4b10f83
Make this compile without DDB.
2003-01-04 18:04:43 +00:00
a8699889af
use "booted_device" when calling setroot(), so that raidframe autoconfigured
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root works... now with a "/boot" partition holding /ofwboot & /netbsd i can
have a raidframe root without hard coding root at in my kernel.
2003-01-04 17:00:27 +00:00
f6fc3bd5fc
new cpu_switch: SMP: even if we pick up the same process after idling, we
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must reset its context as the process might have run on another cpu in
between and had its context changed, e.g. by exec(2).
2003-01-04 11:09:18 +00:00
277fb5e18a
remove a now bogus comment from xcall()
2003-01-03 16:27:23 +00:00
68da24bd3d
- remove some dead debug code
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- don't cross call the smp_tlb_flush*() routines on SUN4D, just ensure
that there is only one concurrent flush happening.
2003-01-03 16:24:50 +00:00
fb1500c7e1
remove dead extern fpproc/foundfpu declarations.
2003-01-03 16:21:05 +00:00
5b23b7800a
FPU save is handled in xcall() now.
2003-01-03 16:20:21 +00:00
444faacaac
xcall(): consult the `cpuset' argument for posting the cross calls.
2003-01-03 15:49:11 +00:00
0a78c9e13a
Define a few XCALL? shorthand macros to avoid clutter.
2003-01-03 15:44:55 +00:00
a250e57c96
Install release files under "${RELEASEDIR}/${MACHINE}/..." instead of
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"${RELEASEDIR}/...".
${RELEASEDIR} is never cleaned , and ${RELEASEDIR}/${MACHINE} is only
cleaned if UPDATE is not defined.
2003-01-03 15:34:30 +00:00
ff451161e2
Finish FPU context switching on SMP systems.
2003-01-03 15:12:02 +00:00
87a073002c
Make the *_stream_* methods always use the *_real accessors.
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Define __BUS_SPACE_HAS_STREAM_METHODS.
2003-01-03 13:23:39 +00:00
7bd617d237
part one of bus_space(9) fixes to enable bus spaces to override the
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bus_space_{read,write}_[1248]() functions, which will allow 16-bit
PCMCIA support to work without additional hacks in MI drivers.
this option is not enabled yet.
2003-01-03 11:57:45 +00:00
3021da226f
Cosmetic fix -- move __HAVE_MIPS_MACHDEP_CACHE_CONFIG to "MIPS specific
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options" section.
2003-01-03 10:30:00 +00:00
947028ed94
reverse mailbox physical address check: now warn if it's not I/O space.
2003-01-03 09:22:11 +00:00
3f5be1863e
srmmu cache flush: use to the CPU context parameter; this is now required.
2003-01-03 09:19:03 +00:00
0cff9e28dc
Checkpoint of O2 work by Chris Sekiya and myself. This is the sgimips bit;
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still needs some arch/mips support code before it will fully work.
2003-01-03 09:09:21 +00:00
b983746705
Also remove `options MIPS3_5200' since nothing uses it ATM.
2003-01-03 08:18:20 +00:00
2d6f1ac150
The Tigon driver is known to have issues on BE systems, so remove it (I got
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the card probed & attached, but had to hack the driver source to even get
it that far and it had issues after that which made me punt on it).
2003-01-03 08:14:44 +00:00
f2c485b280
Move console setup after we've determined machine type so the console init
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code can guess where to find a console depending on machine type.
2003-01-03 06:26:06 +00:00
fe84d50d7e
Mark the CRIME/MACE register twiddling done after autoconfig with an XXX so
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it gets cleaned out when the interrupt registration code is capable of doing
the interrupt mask setup itself.
2003-01-03 06:24:18 +00:00
285679b875
Added new ioctl command, WSMOUSEIO_GETID to tell touch panel identifier
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for tpctl(8).
2003-01-03 04:36:26 +00:00
81c6d35e2b
Remove obsolete MACHINE_ARCH -> arm32
2003-01-03 02:40:57 +00:00
c2e9de7319
Don't define -D${MACHINE} in Makefile.arm. Instead, let platforms
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that care define it themselves. Note that evbarm NO LONGER defines
-D${MACHINE}.
2003-01-03 02:34:48 +00:00
bc45f5ceeb
Split board-specific Makefile fragments into their own files.
2003-01-03 02:16:26 +00:00
e5afd96a97
Use the common linker script for all evbarm platforms.
2003-01-03 02:02:11 +00:00
b179f9cf73
Use the generic irq_dispatch.S
2003-01-03 00:55:59 +00:00
6620220d46
Use the generic irq_dispatch.S
2003-01-03 00:41:19 +00:00
074858daeb
Fiddle with current_intr_depth in assembly code again. Because we
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have just pushed a frame, we can make some assumptions that the
compiler cannot as easily make, and can thus do it slightly more
efficiently.
2003-01-03 00:38:16 +00:00
6c9c7f3b21
Garbage-collect prev_intr_depth; nothing uses it.
2003-01-02 23:54:39 +00:00
thorpej