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299 Commits

Author SHA1 Message Date
matt
b6b04cb00c In mftb(), make sure we say we are clobbering cr0. 2002-09-26 01:13:32 +00:00
simonb
63096043b3 Use "#define\t" instead of "#define ". 2002-09-22 08:30:56 +00:00
chs
c081614ea2 it really helps to get the stub right before cutting + pasting it 27 times. 
alas, I did not.  doh.
 2002-09-22 07:53:39 +00:00
chs
55e1f79335 add pmap_remove_all() hook (empty on most platforms so far). 2002-09-22 07:17:08 +00:00
gmcgarry
dca80f08fd Add __HAVE_MD_RUNQUEUE flag for MD code to override MI run queue primitives. 2002-09-22 04:11:32 +00:00
matt
45e5f68016 Allow MAXPHYS to be overriden. Increase the default MSGBUFSIZE to 2 pages. 2002-09-06 19:26:26 +00:00
matt
d2965f3ad3 Prepare for PPC64. Use register_t for mtmsr/mfmsr since the msr on PPC64 
is 64bits wide.  Define proper types for PPC64 if _LP64 is defined.
 2002-08-14 15:41:57 +00:00
matt
571dd402e2 Add a bunch of mpc8xx SPR definitions. 2002-08-14 15:38:40 +00:00
simonb
f0302072f1 Use "ibm4xx" instead of "galaxy"; galaxy was an early code name for the 
405GP.
 2002-08-13 05:43:24 +00:00
simonb
497d6762cf Split out device register definitions to their own files as the are 
common across many of the 4xx parts.  Leaves ibm405gp.h with device
address information specific to the 405GP CPU.  Now allows opb.c to
support multiple 4xx CPU types.
 2002-08-13 04:57:48 +00:00
simonb
95319edf4a Add some IBM 4xx CPU PVR values; sort PVRs numerically. 
White space nits.
 2002-08-11 13:33:00 +00:00
simonb
ef1df3654e Define the 4xx PVR values in one place only. 2002-08-11 13:32:20 +00:00
matt
549ac19770 Add IBM Power3 CPUID. 2002-08-10 21:38:06 +00:00
matt
0fb9cba190 Add SPR_ASR from OEA-64. Change mfspr to use register_t. 2002-08-08 22:49:09 +00:00
chs
0a97a311e2 it's PPC_HAVE_FPU, not PPC_HAS_FPU. 
also, include the headers that turn on FPU and AltiVec features
in case no one else does.
 2002-08-08 01:27:35 +00:00
tsubai
e373d8b520 Re-correct previous. It's intentional. 2002-08-07 08:01:57 +00:00
briggs
0b956d0b8b Implement pmc(9) -- An interface to hardware performance monitoring 
counters.  These counters do not exist on all CPUs, but where they
do exist, can be used for counting events such as dcache misses that
would otherwise be difficult or impossible to instrument by code
inspection or hardware simulation.

pmc(9) is meant to be a general interface.  Initially, the Intel XScale
counters are the only ones supported.
 2002-08-07 05:14:47 +00:00
matt
a2e9fe106d Correct __va_list typedef for GCC 3.* to match the GCC 3.* definition. 2002-08-07 00:11:59 +00:00
chs
2928d8ba05 actually we shouldn't hold kernel_lock while calling postsig(). 2002-08-06 06:18:24 +00:00
chs
0924752f24 add the MSSCR0 register and some more L2CR fields. 2002-08-06 06:17:50 +00:00
chs
461184c6b6 fix the calculation of the address of the IPI dispatch register. 2002-08-06 06:16:42 +00:00
chs
301f1ebf31 move more inlines to cpu.h: mftb(), mftbl() and mfpvr(). 
(the mftb() in pmap.c only wanted the lower 32 bits, so that's now mftbl()).
 2002-08-06 06:14:33 +00:00
chs
810cde53cc use a completely separate trap handler for syscall traps. 
this reduces syscall overhead by 10% to 20% depending on cpu type.
 2002-08-02 03:46:42 +00:00
matt
3e158de7c1 Don't define register references if not KERNEL or STANDALONE. 2002-07-30 06:09:10 +00:00
chs
03315186b6 install atomic.h. 2002-07-28 07:11:25 +00:00
chs
a7171ee431 add some atomic operations. 2002-07-28 07:09:28 +00:00
chs
fccc379b30 restructure the FPU and AltiVEC code so that it works for MP. 2002-07-28 07:07:44 +00:00
chs
84b41b2adb rearrange the PCB structure a bit so it's easier to look at in ddb. 2002-07-28 07:02:54 +00:00
chs
4b5a2a3f79 define CPU_INFO iterators so that the CPU-states sysctl works for MP. 2002-07-28 07:02:29 +00:00
matt
a660a9325f Set normal memory PTEs with PTE_M (memory coherent). Change how we 
remember the "exec"ness of a page.  If a managed page is pmap_enter'ed
with VM_PROT_EXECUTE, remember that it's an "exec"page.  Such that when
additional mapping are performed, no synch'ing of the I-cache is needed.
Revoke "exec"ness when the page is mapped into the kernel with VM_PROT_WRITE
or the pmap_page_protect is called with VM_PROT_NONE.
 2002-07-25 23:33:04 +00:00
chs
185a5bbcf0 rename the intr_depth field of struct intrframe to avoid a name conflict 
in MULTIPROCESSOR builds.
 2002-07-24 05:44:37 +00:00
matt
cde20d8743 Make sure that pmap_zero_page and pmap_copy_page don't make calls or 
reference while relocation is disabled since the stack will be inaccessible.
Add support for using AltiVec in pmap_zero_page and pmap_copy_page on
AltiVec capable processors.
 2002-07-18 22:51:57 +00:00
matt
436f257283 Add a common file to do pmap_zero_page/pmap_copy_page/pmap_pageidlezero and 
pmap_syncicache.  This file uses a ppc feature in a sick and twisted way
to avoid mapping the physical pages used by those routines.  It performs
the operations with the MMU disabled but PPC exception save and retstore
the machine state and are invoked with the MMU disabled, this doesn't have
an adverse effect on the system.

Currently only enable for MPC6xx and !OLDPMAP.
 2002-07-17 03:11:07 +00:00
matt
ece8b74130 Add machdep.powerpc sysctl. Change the default value of powersave to -1 
(< 0 mean no powersave available).  Enable powersave by default for
750/7400/7410 but leave if off for 7450/7455.
 2002-07-16 23:04:20 +00:00
matt
6e81c6293f Bump VM kernel buffer space from 128MB to 192MB now that we have 512MB of 
KVA space.
 2002-07-10 05:25:12 +00:00
matt
e64bc5acc1 Allow USER_SR to be overriden on a per-port basis 2002-07-07 19:29:18 +00:00
matt
51f2834470 Bump max user address to 0xfffff000 (XXX maybe it should be -NBPG?). 2002-07-06 17:15:57 +00:00
matt
685778b53b Peform a rototill over the powerpc-based ports. 
Move the trap/vector initialization for MPC6xx ports to mpc6xx_machdep.c
Also move softnet, install_extintr, mapiodev, kvtop.  Add common BAT
initialization code.

Add user Altivec support.

Fix calls to OF_call_method in macppc/macppc/machdep.c.

Use ci_fpuproc in cpu_info instead of separate fpuproc.

Add separate syscall.c and defined __HAVE_SYSCALL_INTERN.
 2002-07-05 18:45:15 +00:00
thorpej
00e59f25b7 Eliminate two unused sigframe members. 2002-07-04 21:33:43 +00:00
matt
708f4c7b9b Add VRSAVE. 2002-07-01 20:11:05 +00:00
matt
1a5c0cf685 When not using the OLD pmap, bump kernel KVA space to 512MB (OLD pmap stays 
at 256MB).
 2002-06-26 01:16:22 +00:00
thorpej
aaf6e7902d Add ENTRY_NOPROFILE(). 2002-06-23 17:26:58 +00:00
matt
da483421e8 Add IBM750FX (0x7000) 2002-06-20 23:51:22 +00:00
briggs
d6cfd2cc8c Include the Processor ID for the MPC8245. 2002-06-19 17:39:26 +00:00
tsubai
5fcd112b3a Add gcc 3.x version. 2002-06-01 09:22:44 +00:00
augustss
e916f073c3 Add bus_space_vaddr(). 2002-05-31 11:31:30 +00:00
jdolecek
2fc860bc0d make usable in LKM context (use #if defined(_KERNEL_OPT)) 2002-05-19 16:55:43 +00:00
augustss
aaf6178285 Handle the "aligment" fault generated by DCBZ when the cache is off. 
That way you can run the processor with caches off.
 2002-05-19 06:35:45 +00:00
matt
f62dc5c664 Remove redundant declarations. 2002-05-13 07:04:24 +00:00
matt
d210f0530b Eliminate commons. 2002-05-13 06:05:32 +00:00