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Author SHA1 Message Date
nonaka
cb608a466d include "opt_ppcparam.h" for VERBOSE_INITPPC. 2014-12-28 14:13:56 +00:00
maxv
fc8f062e48 Prevent another division by zero in ntfs_loadntnode() by ensuring 
spc != 0.
 2014-12-28 13:11:52 +00:00
maxv
c1acce042f Ensure bps != 0 to prevent a division by zero. Zero byte per sector makes 
no sense.
 2014-12-28 12:57:44 +00:00
maxv
6d178278b3 Two typos: 
- reserver4 -> reserved4 (in struct bootfile)
 - "inducates" -> "indicates" (comment)
 2014-12-28 12:19:21 +00:00
maxv
ead51937de Make this more readable (KNF). 2014-12-28 12:13:22 +00:00
martin
44d35daebe We can not rely on the existence of the "gpt" binary on install media - 
make installation work without it (and without strange errors) again.
 2014-12-28 12:05:27 +00:00
martin
42a1d150e6 Move bogusly merged files over to new location. 2014-12-28 11:51:10 +00:00
martin
06e406a946 Add missing return in __SOFTFP__ variant, pointed out by htodd. 2014-12-28 10:15:29 +00:00
nonaka
4145a4107f obsolete malloc_roundup(9), malloc_type_setlimit(9) and MALLOC_DEFINE_LIMIT(9) 
man pages.
 2014-12-28 05:10:06 +00:00
jmcneill
cc521a8b25 add support for detecting memory size. 2GB config doesnt work yet, so keep MEMSIZE set for now. 2014-12-28 01:51:37 +00:00
jmcneill
04c8013de7 add DDR offsets 2014-12-28 01:50:39 +00:00
wiz
80d8011c53 New sentence, new line. Bump date for previous. 2014-12-27 20:45:08 +00:00
jmcneill
227b4fc43d Bring this closer to Allwinner / RPI configs: 
Add MSDOSFS, KERNFS, PROCFS, INET6, SYSVMSG, SYSVSEM, SYSVSHM, BUFQ_PRIOCSCAN.
Remove DEBUG, LOCKDEBUG, VERBOSE_INIT_ARM.
Change DDB_ONPANIC from 2 to 1.
Cinclude ROCKCHIP.local
 2014-12-27 20:28:09 +00:00
maxv
b5f5bad3a4 Cleanup: 
- remove struct kmembuckets (dead)
 - correctly deadify MALLOC_XX
 - remove MALLOC_DEFINE_LIMIT and MALLOC_JUSTDEFINE_LIMIT (dead)
 - remove malloc_roundup(), malloc_type_setlimit(), MALLOC_DEFINE_LIMIT()
   and MALLOC_JUSTDEFINE_LIMIT() from man 9 malloc
 2014-12-27 19:32:57 +00:00
jmcneill
5a5504772e set DWC_MMC_F_PWREN_CLEAR, implement set_clkdiv callback; now this works 2014-12-27 19:18:35 +00:00
jmcneill
2e2c694be9 - Explicitly initialize CLKSRC register. 
- Reset FIFO and DMA along with controller.
- Support chips with inverted PWREN logic.
- Enable RXDR and TXDR irqs.
- Set max clk based on supplied clock freq.
- Use external clk control as well as internal divisor to set clock rates.
  Requires bus glue to implement sc_set_clkdiv callback.
 2014-12-27 19:18:04 +00:00
jmcneill
49d38ddd1c update some bits for rk3188 2014-12-27 19:14:34 +00:00
jmcneill
d796438e59 mmc0 on rk3188 is based on ahb clk, not gpll. add a function to control mmc0 clock as well. 2014-12-27 19:14:05 +00:00
martin
ea1bc3e21f Move the list of <fenv.h> supporting architectures to the makefile and 
sync it with other copies.
 2014-12-27 18:03:41 +00:00
martin
619d31d686 Enable fenv for arm 2014-12-27 18:00:13 +00:00
nonaka
58e7278559 Added SPI register definitions. 2014-12-27 17:58:21 +00:00
martin
5fe2180eb8 Enable fenv.h on arm again 2014-12-27 17:55:05 +00:00
martin
b137db7576 Add our common non standard extensions and fix typo (FE_EXCEPT_ALL -> 
FE_ALL_EXCEPT).
 2014-12-27 17:54:24 +00:00
martin
b19178f8f4 Fix consistent typo: it is FE_ALL_EXCEPT instead of FE_EXCEPT_ALL (this 
went unnoticed as the undefined macro evaluated to 0 and the expression
was always used with ~)
 2014-12-27 17:52:45 +00:00
macallan
735afce6b0 restrict DMA buffers to the lower 256MB -> now dwc2 DMA works 2014-12-27 17:22:15 +00:00
martin
dce8d6f504 fenv(3) support for hppa 2014-12-27 16:54:02 +00:00
nonaka
217677d4fc Preliminary support for P1023. 2014-12-27 16:19:33 +00:00
jmcneill
5040b7889f use rockchip_a9periph_get_rate for a9tmr frequency 2014-12-27 16:19:24 +00:00
jmcneill
db2b5e227e More clock fixes, debugging. 2014-12-27 16:18:50 +00:00
skrll
d78d7c6c1a Add .arch_extension sec to fix build. (v7a on it's own complains) 2014-12-27 15:52:42 +00:00
nonaka
31a92299ef Added MMUv2 define. 2014-12-27 12:36:48 +00:00
jmcneill
9ac0c0c11a timer_clk is 24MHz 2014-12-27 04:20:38 +00:00
jmcneill
5eeafad29c use correct bs tag for arml2cc_init 2014-12-27 03:58:52 +00:00
jmcneill
8f94c21074 dont hard-code cpu_cc_freq 2014-12-27 02:40:23 +00:00
jmcneill
d6981c8bf9 add functions to get apll and cpu rates 2014-12-27 02:12:29 +00:00
jmcneill
79ec78c527 add dwcmmc 2014-12-27 01:29:13 +00:00
jmcneill
4ba10ef8d8 add dwcmmc glue, doesnt work yet 2014-12-27 01:22:07 +00:00
jmcneill
7dd8c319cc add helpers to get gpll and ahb clock rates 2014-12-27 01:21:21 +00:00
jmcneill
14e2578603 use rockchip_crureg.h 2014-12-27 01:21:02 +00:00
jmcneill
c5815fac2d add CRU reg definitions 2014-12-27 01:20:31 +00:00
jmcneill
21d168c081 add DesignWare SD/MMC controller driver 2014-12-27 01:18:48 +00:00
christos
a08b1ebd50 allow turning off the bpf jit loading. 2014-12-26 22:44:54 +00:00
martin
deab0235f8 "Jared broke my kernel by adding comments!" - make it compile again 2014-12-26 21:45:17 +00:00
rmind
027d5f223a npfctl(8): attempt to preload bpfjit kernel module and print the 
warning on failure.
 2014-12-26 20:44:38 +00:00
mrg
9e53ba939e more for the previous: make sure [i - 1] can never go negative. 2014-12-26 19:52:00 +00:00
mrg
7ce92dc944 properly handle ilen = 0 case, which could lead to array underflow. 
pointed out by Maxime Villard.
 2014-12-26 19:48:52 +00:00
jmcneill
3d2a425be2 Map all of core0 and core1 space and let drivers use bus_space_subregion 
instead of bus_space_map. Fill in rockchip_reset.
 2014-12-26 19:44:48 +00:00
dholland
fd190b9d38 typo in previous 2014-12-26 19:15:04 +00:00
macallan
c694bc3ec4 put #ifdef MIPS3_ENABLE_CLOCK_INTR around special handling of INT5 2014-12-26 18:08:52 +00:00
macallan
eea171a74c make interrupt names part of the handler struct so event counters will show 
up correctly
also reshuffle debug code a bit
 2014-12-26 18:06:52 +00:00