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15 Commits

Author SHA1 Message Date
pk 2079f86890 On-board devices on psycho machines seem to have the `interrupt' property 
in the parent bus format (i.e. an INO) rather than being represented as
an PCI interrupt line. Provide a hack to work around this in pci_attach_hook().
 2000-07-26 17:46:56 +00:00
pk 34270e85bd Use probeget() in pci_config_read() for the psycho, to avoid bus 
faults when probing PCI space.
 2000-07-18 11:37:31 +00:00
pk 406e0f779f Add a `device class' interrupt level argument (from machine/intr.h) 
to bus_interrupt_establish().

It's currently only used in sparc64/dev/psycho.c to assign a CPU interrupt
level to devices in PCI slots.
 2000-07-09 20:57:41 +00:00
mrg 4d14e81c0b remove include of <vm/vm.h>. <vm/vm.h> -> <uvm/uvm_extern.h> 2000-06-29 07:37:53 +00:00
mrg 2f159a1bac remove/move more mach vm header files: 
<vm/pglist.h> -> <uvm/uvm_pglist.h>
	<vm/vm_inherit.h> -> <uvm/uvm_inherit.h>
	<vm/vm_kern.h> -> into <uvm/uvm_extern.h>
	<vm/vm_object.h> -> nothing
	<vm/vm_pager.h> -> into <uvm/uvm_pager.h>

also includes a bunch of <vm/vm_page.h> include removals (due to redudancy
with <vm/vm.h>), and a scattering of other similar headers.
 2000-06-26 14:20:25 +00:00
mrg b6026e7c35 kill dead code. 2000-06-18 07:12:39 +00:00
eeh 7539c8d1ce Turn on PCI MEM and DMA. 2000-06-08 23:03:17 +00:00
cgd cffb580806 Implement the more flexiable `evcnt' interface as discussed (briefly) on 
tech-kern and now documented in evcnt(9).
 2000-06-04 19:14:14 +00:00
eeh ca743bac9a Use the PCI function code to distinguish simba bus A from bus B instead 
of the current hack.
 2000-05-24 20:27:52 +00:00
mrg 651712a140 add a note about US IIi and PCI_INTERRUPT_LINE register 2000-05-17 09:25:58 +00:00
mrg 5b5f175f38 - store the ebus's parent so we can find the IOMMU 
- use generic iommu routines in the ebus code (uses the above)
- add some more comments.
 2000-04-08 04:33:09 +00:00
mrg add6dbf96c clean this up some. 2000-04-05 08:03:03 +00:00
eeh 186c3eba2b Make pbrobeget() and probeset() work for 64-bit values as well. To do this 
the arguments are changed so the address is first and the ASI second so we
can have the address in %o0:%o1 and not worry about unused registers.

Also a bit of copyright cleanup.
 1999-06-05 21:58:16 +00:00
mrg da265ce045 clean up a bit, implement pci_conf_{read,write}() with probe[gs]et() (not yet used). 1999-06-05 05:29:50 +00:00
mrg 03adf4aad1 PCI driver for the UltraSPARC. this only works on the Ultra5/10 machines 
(`SUNW,sabre') for now, and it doesn't really quite work there yet anyway.
the bus space/dma code is cloned from the sbus driver.  the IOMMU code also
is cloned from the sbus code, but separated out into iommu.c so that we can
share it with the sbus driver.  hopefully, much of the bus space/dma code
can also be re-shared with the sbus driver and the ebus driver but for now
these copies will do.

support for the real UltraSPARC PCI (`SUNW,psycho') is unwritten, though
most of this code is shared with it.

we can probe PCI config space and try to configue devices, but interrupts
don't work yet...
 1999-06-04 13:42:14 +00:00