Commit Graph

76 Commits

Author SHA1 Message Date
nakayama
ead4e6f7b9 Improve IPI handling:
- make IPI takes two arguments.
- add IPI event counters per-CPU.
- implement IPI functions which were missing or broken.
- insert DELAY while halting primary CPU in IPI handler.
2008-03-14 15:38:00 +00:00
nakayama
29dbeb72e1 - make interrupt pending list per-CPU.
- make tickintr() MP-safe.
- remove unused port-sparc derived interrupt code.

Ok by martin@.
2008-03-02 15:28:26 +00:00
martin
a9e7d15afd Make TSBs and MMU contexts per-cpu. 2008-02-28 11:50:40 +00:00
xtraeme
f402cadf9a Remove CTL_MACHDEP_NAMES, it's not used anywhere.
Ok by martin@.
2008-02-27 18:26:15 +00:00
martin
1fc8a17916 Get rid of the IPI simple_lock. 2008-02-22 10:55:00 +00:00
martin
828c9eb2ec remove unused extern declarations 2008-02-18 21:08:42 +00:00
martin
4262f42f3b For non-mpsafe interrupt handlers, grab the kernel lock via a biglock
wrapper. Fixes PR port-sparc64/37468.
2008-02-18 12:16:37 +00:00
martin
8409a2d11e Rename cpuset_t for now to sparc64_cpuset_t, to avoid a name clash with
<sys/pset.h>. Mid-term we should probably convert to the MI cpuset_t.
2008-01-15 10:35:33 +00:00
martin
3947df41d1 Provide cpu_intr_p(), at least for non-MULTIPROCESSOR kernels.
Based on suggestions by Andrew Doran.
2007-12-09 20:12:54 +00:00
garbled
d974db0ada Merge the ppcoea-renovation branch to HEAD.
This branch was a major cleanup and rototill of many of the various OEA
cpu based PPC ports that focused on sharing as much code as possible
between the various ports to eliminate near-identical copies of files in
every tree.  Additionally there is a new PIC system that unifies the
interface to interrupt code for all different OEA ppc arches.  The work
for this branch was done by a variety of people, too long to list here.

TODO:
bebox still needs work to complete the transition to -renovation.
ofppc still needs a bunch of work, which I will be looking at.
ev64260 still needs to be renovated
amigappc was not attempted.

NOTES:
pmppc was removed as an arch, and moved to a evbppc target.
2007-10-17 19:52:51 +00:00
martin
913f43886d Cleanup cpu_info: get rid of ci_number and ci_upaid, use ci_index
and ci_cpuid instead.
2007-09-11 16:00:05 +00:00
martin
e680b6ed1a Make cpufrequency and friends per cpu values.
Prepare a hz tick interrupt on secondary CPUs via %tick, but do not
enable it yet, as it breaks ddb.
2007-09-09 22:37:39 +00:00
martin
782448944c Remove INITSTACK completely - at the time we used to switch to it, we
already have access to all of lwp0 and it's uarea - so we can switch
to the correct lwp0 stack easily before calling main.
2007-08-25 19:16:10 +00:00
yamt
f03010953f merge yamt-idlelwp branch. asked by core@. some ports still needs work.
from doc/BRANCHES:

	idle lwp, and some changes depending on it.

	1. separate context switching and thread scheduling.
	   (cf. gmcgarry_ctxsw)
	2. implement idle lwp.
	3. clean up related MD/MI interfaces.
	4. make scheduler(s) modular.
2007-05-17 14:51:11 +00:00
christos
53524e44ef Kill caddr_t; there will be some MI fallout, but it will be fixed shortly. 2007-03-04 05:59:00 +00:00
ad
3363855a4a Remove spllowersoftclock() and CLKF_BASEPRI(), and always dispatch callouts
via a soft interrupt. In the near future, softclock will be run from process
context.
2007-02-16 02:53:43 +00:00
ad
b07ec3fc38 Merge newlock2 to head. 2007-02-09 21:55:00 +00:00
martin
05a4f3ccd9 Remove obsolet kgdb parts 2006-10-16 22:21:52 +00:00
mrg
fa535729f9 remove some sparc v8 only definitions. 2006-10-02 23:22:52 +00:00
martin
0b9bd89cf1 Lazy FPU handling for the MULTIPROCESSOR case 2006-09-18 08:18:47 +00:00
martin
092e3c8b7a Do not bother to save fpu state when we are about to get rid of it. 2006-09-15 07:42:38 +00:00
mrg
2102e18c4b SMP cleanup. provide support for multiple CPUs in DDB. (SMP itself
is still not working.)

cpu.h:
- add a pointer for DDB regs in SMP environment to struct cpu_info
- remove the #defines for mp_pause_cpus() and mp_resume_cpus()
cpuset.h:
- remove CPUSET_ALL() and rename CPUSET_ALL_BUT() to CPUSET_EXCEPT()
  from petrov.
db_machdep.h:
- rename the members of db_regs_t to be the same as sparc
- change "db_regs_t ddb_regs" to "db_regs_t *ddb_regp" and change
  all references to suit
- redo DDB_REGS to no longer be a pointer to a fixed data structure
  but to one allocated per-cpu when ddb is entered
- move a bunch of prototypes in here
intr.h:
- remove SPARC64_IPI_* macros, no longer used
db_interface.c:
- change "db_regs_t ddb_regs" to "db_regs_t *ddb_regp" and change
  all references to suit
- make "nil" a 64 bit entity
- change the ddb register access methods to work in multiprocessor
  environment, it is now very much like sparc does it
- in kdb_trap() avoid accessing ddb_regp when it is NULL
- update several messages to include the cpu number
- unpause other cpus much later when resuming from ddb
- rename db_lock() to db_lock_cmd(), as the sparc-like code has
  db_lock as a simple lock
- remove "mach cpus" command, and replace it with "mach cpu" (which
  does the same) and also implement "mach cpu N" to switch to
  another cpus saved trapframe
db_trace.c:
- update for the ddb_regs -> ddb_regp change
genassym.cf:
- add TF_KSTACK as offsetof(struct trapframe64, tf_kstack)
ipifuncs.c:
- overhaul extensively
- remove all normal interrupt handlers as IPI's, we now handle
  them all specially in locore.s:interrupt_vector
- add a simplelock around all ipi functions - it's not safe for
  multiple cpus to be sending IPI's to each other right now
- rename sparc64_ipi_pause() to sparc64_ipi_pause_thiscpu() and,
  if DDB is configured, enable it to save the passed-in trapframe
  to a db_regs_t for this cpu's saved DDB registers.
- remove the "ipimask" system (SPARC64_IPI_* macros) and instead
  pass functions directly
- in sparc64_send_ipi() always set the interrupt arguments to 0,
  the address and argument of the to be called function.  (the
  argument right now is the address of ipi_tlb_args variable, and
  part of the reason why only one CPU can send IPI's at a time.)
  don't wait forever for an IPI to complete.  some of this is
  from petrov.
- rename sparc64_ipi_{halt,pause,resume}_cpus() to
  mp_{halt,pause,resume}_cpus()
- new function mp_cpu_is_paused() used to avoid access missing
  saved DDB registers
- actually broadcast the flush in smp_tlb_flush_pte(),
  smp_tlb_flush_ctx() and smp_tlb_flush_all().  the other end may
  not do anything yet in the pte/ctx cases yet...
kgdb_machdep.c:
- rework for changed member names in db_regs_t.
locore.s:
- shave an instruction from syscall_setup() (set + ld -> sethi + ld)
- remove some old dead debug code
- add new sparc64_ipi_halt IPI entry point, it just calls the C
  vector to shutdown.
- add new sparc64_ipi_pause IPI entry point, which just traps into
  the debugger using the normal breakpoint trap.  these cpus usually
  lose the race in db_interface.c:db_suspend_others() and end up
  calling the C vector sparc64_ipi_pause_thiscpu().
- add #if 0'ed code to sparc64_ipi_flush_{pte,ctx}() IPI entry
  points to call the sp_ version of these functions.
- in rft_kernel (return from trap, kernel), check to see if the
  %tpc is at the sparc64_ipi_pause_trap_point and if so, call
  "done" not "retry"
- rework cpu_switch slightly:  save the passed-in lwp instead of
  using the one in curlwp
- in cpu_loadproc(), save the new lwp not the old lwp, to curlwp
- in cpu_initialize(), set %tl to zero as well.  from petrov.
- in cpu_exit(), fix a load register confusion.  from petrov.
- change some "set" in delay branch to "mov".
machdep.c:
- deal with function renames
pmap.c:
- remove a spurious space
trap.c:
- remove unused "trapstats" variable
- add cpu number to a couple of messages
2006-09-13 11:35:53 +00:00
kardel
09b51ec920 convert to timecounters (from branch simonb-timecounters) 2006-06-07 22:37:14 +00:00
cdi
d0f8217f78 Use ANSI-style function definitions and declarations. 2006-02-20 19:00:27 +00:00
cdi
d50f0c6274 ANSIfication: u_intN_t -> uintN_t, use ANSI function declarations/definitions
instead of K&R ones.
2006-02-11 17:57:31 +00:00
cdi
4c2e4320bd Alter sparc64 bootstrap, catch up to ofwboot v1.9:
- Accept bootinfo structure passed down from ofwboot v1.9
 - Drop kernel re-mapping code
 - Use permanent 4MB mappings provided by the loader instead
 - Change kernel entry address to point directly at the code instead of pointing
   at the trap table's first slot. This allows the bootloader to detect
   those kernels which are aware of the new boot scheme
 - Due to the changes in kernel mapping code, alter secondary CPU bootstrap
   code to use trampoline just like FreeBSD does (some FreeBSD code is used
   here as well)
2006-01-27 18:37:49 +00:00
perry
5f1c88d70d Remove leading __ from __(const|inline|signed|volatile) -- it is obsolete. 2005-12-24 20:06:46 +00:00
christos
95e1ffb156 merge ktrace-lwp. 2005-12-11 12:16:03 +00:00
martin
eb8540417a Follow the lead of the sparc port:
- move md_flags back to mdproc, because we only have per-proc flags
   currently
 - implement cpu_proc_fork() to init p_md.md_flags on fork
2005-10-27 20:43:30 +00:00
briggs
7f01fdeb84 Rename 'ncpus' to 'sparc_ncpus' to avoid shadow warnings in m.i. code.
Also sprinkle an __UNVOLATILE() for sparc.
n.b. sparc64 'cpus' should probably be renamed to 'cpu_info_list' to
     match i386 et al.
2005-06-16 04:17:49 +00:00
yamt
d2fe4b34bb move some per-cpu data definitions to MI place so that they can be modified
without touching all ports.  discussed on tech-kern@.
2004-09-22 11:32:02 +00:00
martin
d0c69e4d18 Fix small glitches to make SMP kernels compile again. 2004-06-18 12:51:39 +00:00
petrov
8b0935d09f Define mp_pause(resume)_cpus needed for callprom. 2004-06-18 00:05:05 +00:00
chs
cec587ddf6 checkpoint of MP work from dennis and myself. includes cross-processor
interrupt framework, a sledgehammer TLB invalidation and misc MP fixes.
doesn't work at all yet.
2004-03-14 18:18:54 +00:00
petrov
e459d2a294 Spinup secondary cpus. Based on codes sent to me by Dennis Chernoivanov
and Chuck Silvers.
2004-01-06 09:38:19 +00:00
jdolecek
089abdad44 Rearrange process exit path to avoid need to free resources from different
process context ('reaper').

From within the exiting process context:
* deactivate pmap and free vmspace while we can still block
* introduce MD cpu_lwp_free() - this cleans all MD-specific context (such
  as FPU state), and is the last potentially blocking operation;
  all of cpu_wait(), and most of cpu_exit(), is now folded into cpu_lwp_free()
* process is now immediatelly marked as zombie and made available for pickup
  by parent; the remaining last lwp continues the exit as fully detached
* MI (rather than MD) code bumps uvmexp.swtch, cpu_exit() is now same
  for both 'process' and 'lwp' exit

uvm_lwp_exit() is modified to never block; the u-area memory is now
always just linked to the list of available u-areas. Introduce (blocking)
uvm_uarea_drain(), which is called to release the excessive u-area memory;
this is called by parent within wait4(), or by pagedaemon on memory shortage.
uvm_uarea_free() is now private function within uvm_glue.c.

MD process/lwp exit code now always calls lwp_exit2() immediatelly after
switching away from the exiting lwp.

g/c now unneeded routines and variables, including the reaper kernel thread
2004-01-04 11:33:29 +00:00
cdi
d49bc81070 Use per-cpu pcb, curlwp and fplwp rather than global ones. This brings
GENERIC.MP configuration to a usable state.

Approved by petrov@.
2003-11-25 05:14:58 +00:00
petrov
b56164b9ed Set curcpu() for SMP. 2003-11-20 08:04:04 +00:00
petrov
5af3af05f4 Compile GENERIC.MP. 2003-11-15 05:24:51 +00:00
tsutsui
112c91d583 Use #if defined(_KERNEL_OPT) to protect #include "opt_xxx.h"
from building LKM etc. Suggested by mrg.
2003-11-09 05:29:59 +00:00
agc
aad01611e7 Move UCB-licensed code from 4-clause to 3-clause licence.
Patches provided by Joel Baker in PR 22364, verified by myself.
2003-08-07 16:26:28 +00:00
nakayama
8920acd333 Switch to use cycle counter (%tick) based microtime().
This is derived from alpha/microtime.c and i386/tsc_microtime.c,
and will share with both ports.

This should fix PR port-sparc64/18452.
(approved by martin)
2003-02-05 12:06:51 +00:00
thorpej
d2275d51e1 Merge the nathanw_sa branch. 2003-01-18 06:55:21 +00:00
pk
4cd21bc0aa Sync machdep sysctls with sparc. 2002-11-27 18:00:27 +00:00
chs
50403f5ce2 remove some vestigial FPU and cache code that's not need on ultrasparcs.
misc tidiness.
2002-09-29 04:12:02 +00:00
eeh
d295742774 Have CLKF_BASEPRI() always return false for now to prevent hardclock
from being blocked by softclock.
2002-05-14 21:21:45 +00:00
eeh
c42bdc6b14 Correctly take into account the satck bias in CLKF_INTR(). 2002-02-09 04:50:13 +00:00
mrg
be4df68bb5 don't explicitly size the intrhand[] array; fixes PR#13859 from <martti.kuparinen@iki.fi> 2001-09-03 13:07:21 +00:00
thorpej
8eb3b954f1 Don't need to prototype child_return() here, it's in <sys/proc.h>. 2001-06-14 22:56:55 +00:00
thorpej
d74e432ed3 Make softclock a generic soft interrupt of the API is available,
adding the requisite void * argument to softclock().
2001-01-15 20:19:50 +00:00