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Author SHA1 Message Date
yamt
04e9fcc377 nfs_readdirplusrpc: purge existing namecache entry before entering a new one. 
otherwise we'll get duplicated entries.
 2004-04-05 10:36:32 +00:00
yamt
757220a432 when entering a namecache entry for nfs, ensure to update the appropriate 
timestamp in the nfsnode so that we don't get namecache-miss when
looking up the node we just created.
 2004-04-05 10:35:12 +00:00
yamt
0f33822b0b nfsm_wcc_data: update n_ctime and n_nctime if no one other than us 
changed the file in the meantime so that we won't invalidate caches
unnecessarily due to our own activities.
 2004-04-05 10:28:23 +00:00
yamt
f2fb72c33f avoid unnecessary namecache purges in some places. 2004-04-05 10:27:11 +00:00
wiz
136d7943d4 When adding an IPv4 host, one can not leave the IPv4-address field if 
one has entered invalid data (like an incomplete IP).
Their was no feedback about this, though.
Apply a patch from Peter Postma that gives feedback in this case.
Closes problem noted when re-testing PR 16937.
 2004-04-05 10:25:12 +00:00
yamt
0441200d07 bump to 2.0C for the cache_purge change. 2004-04-05 10:22:30 +00:00
wiz
3f41daaf5b Add patch to handle tabs correctly, from Peter Postma. 
Closes my PR 16936.
 2004-04-05 10:21:23 +00:00
yamt
4972de4cca make cache_purge more controlable. 
namely, allow following operations.
	- purge only an entry specified by a component name.
	- purge only child entries.
	- purge only parent entries.
no objections on tech-kern@.
 2004-04-05 10:20:52 +00:00
yamt
9aa8d354bd add assertions related to file descriptor allocation. 2004-04-05 10:10:29 +00:00
wiz
8f3ccb909a Fix typo in previous, and change which(1) 
entry to:
Replaced by a C program that only checks the path. [christos 20040401]
 2004-04-05 09:38:30 +00:00
aymeric
263ab3f13d bump version: failed recovery doesn't prevent edition anymore 2004-04-05 07:22:39 +00:00
aymeric
14069c4665 Don't fail if asked to recover a file for which there is no recovery file. 
Just continue. This matches the man page, the POSIX standard, and even the
comment above that code!
From OpenBSD, via jmc@openbsd, via wiz@netbsd.
POSIX part confirmed by kleink@netbsd
:-)
 2004-04-05 07:19:08 +00:00
aymeric
1bc3c9fb86 fix copying and freeing of options, patch from yamt@ in PR bin/25050. Thanks! 2004-04-05 06:59:15 +00:00
simonb
3ce5632009 Fix tyop. 2004-04-05 04:53:01 +00:00
matt
4cb4fcf23d Note PowerPC FP exception processing. 2004-04-05 03:59:37 +00:00
mrg
1739cf2504 - fix i386_intel_brand[]: it was missing a empty reserved entry at 0xD 
causing Mobile Pentium 4 to be shown as a Mobile Celeron.
- fix intel_family6_name() for brand=0xB && signature >= 0xF13
- fix a potential out-of-bounds array reference
 2004-04-05 02:09:41 +00:00
simonb
19f85c9cf1 Fix a tyop. 2004-04-05 01:39:07 +00:00
wiz
2569049f22 Add comma after "i.e.". 2004-04-04 23:41:23 +00:00
matt
15fc41dbb0 When trying to figure out which code to return, use the exception enable 
bits to mask out the undesired exceptions.  (Thanks to Todd Whitesel for
the idea).
 2004-04-04 22:20:44 +00:00
matt
e5795ee03a Add libraries needed for configure 2004-04-04 20:17:27 +00:00
matt
6aeab1d37b Update FPSCR_FX consistently per the Programming Environment Manual. So 
if any sticky bit is set, FPSCR_FX should be set.  If no sticky bits are
set, then FPSCR_FX should be clear.
 2004-04-04 19:54:05 +00:00
matt
6da9a37235 Deal with the way FP_X_INV works. That maps to FPSCR_VX. However FPSCR_VX 
is not a sticky, it's actually an inclusive OR of 9 stick bits.  So when
FP_X_INV is cleared, we need to clear all of those bits.  When FP_X_INV is
set, we set all of them.
 2004-04-04 19:31:19 +00:00
matt
47e6b704bb Lint cleanup. s/u_int64_t/uint64_t 2004-04-04 19:28:13 +00:00
matt
fb0f2fdab6 Supress a few lint warnings. s/u_int64_t/uint64_t/ 2004-04-04 19:27:19 +00:00
matt
acdea83164 Suppress a lint warning. 2004-04-04 19:26:21 +00:00
matt
e7c76e51e6 Add SIGFPE handling code. Report the proper SIGINFO ksi_code when a SIGFPE 
happens.  When a SIGFPE occurs, disable the exception enables in the FPSCR.
 2004-04-04 19:21:36 +00:00
pk
12d5178857 For now, disable Hypersparc instruction cache on MP machines. 2004-04-04 18:54:01 +00:00
pk
8066aa3aa5 * Allow pv_link4_4c() to fail with ENOMEM on pool allocation failures 
(catching up with pv_link4m()).
* Fix return code checking for pv_link4m() calls.
* Add low water setting to pv pool.
 2004-04-04 18:34:35 +00:00
pk
486f4170eb Remove private declarations of maxdmap and maxsmap. 2004-04-04 18:24:22 +00:00
pk
b3efee4b3b We use maxdmap and maxsmap, so remove comment questioning that. 2004-04-04 18:22:44 +00:00
pk
daff668b49 Use maxdmap and maxsmap instead of MAXDSIZ and MAXSSIZ. 2004-04-04 18:21:48 +00:00
pk
30fdd39bf8 Declare maxdmap and maxsmap. 2004-04-04 18:18:27 +00:00
uwe
e548ab355a Correct the comment about contrast control in HD64461 GPIO port B: 
6th bit is the least significant, 3rd is the most significant.
 2004-04-04 17:49:38 +00:00
matt
bc8d283982 Reformat the __asm a bit. 2004-04-04 17:35:15 +00:00
uwe
7b00555453 Add intro(4) and j6x0lcd(4) for hpcsh. 2004-04-04 17:34:43 +00:00
uwe
1226dc06a6 Document j6x0lcd driver. 2004-04-04 17:28:48 +00:00
matt
5bf797c2e1 Add int get_fpu_fault_code(void). 2004-04-04 17:26:58 +00:00
matt
481d181cd4 In cpu_getmcontext, make sure the returned MSR has the FP exception mode 
(PSL_FE0|PSL_FE1) saved in the PSL.  In cpu_setmcontext, copy the FP
exception bits to the PCB where they live.
 2004-04-04 17:26:10 +00:00
matt
847bed9428 Fix the way cpu_setmcontext was restoring FPSCR. Make the opposite of the 
way that cpu_getmcontext was saving it.  (FPSCR was being saved incorrectly
before and thus obliterated when a signal happened).
 2004-04-04 17:20:15 +00:00
perry
9b863e179d make this man page explain what the calls do somewhat better. 2004-04-04 17:10:48 +00:00
matt
7681ce429d Make sure that the SRR1 we pass to userland reflects PSL_FE0|PSL_FE1 even 
if the lwp doesn't currently own the FPU.  When returning, copy those bits
back to the PCB.  (In case the user decided to the FP exception mode in the
signal handler).
 2004-04-04 17:10:32 +00:00
uwe
d1001802a5 This manual page is hpcsh-specific. Say so in .Dt macro. 2004-04-04 17:06:45 +00:00
matt
4dc0aa3dee Don't add PSL_FE_FDLT to srr1, but put in pcb_flags. It will be added to 
the SRR1 only when the lwp owns the FPU.
 2004-04-04 17:05:31 +00:00
uwe
b40990679f First cut at intro(4) for the NetBSD/hpcsh port. 
PR port-hpcsh/24158.
 2004-04-04 17:03:39 +00:00
matt
44003b5fca The FP exception mode bits from the MSR will be stored in pcb_flags. From 
there, they will copied to MSR as needed (when FP is enabled).  They will be
cleared from the MSR when the lwp loses the FPU.  Hence they need to be stored
someplace else.
 2004-04-04 17:01:44 +00:00
matt
aed3d18029 On FPU'ed systems, initialize the default FP exception mode. 2004-04-04 16:57:00 +00:00
matt
c0dce2fdd9 Be a lot more explicit about the MSR bits a user process can change. 2004-04-04 16:49:12 +00:00
matt
0d6bda4d21 When returning back to user mode, if the lwp has lost the FPU, not only 
clear PSL_FP bit (to force a FPU Unavailable exception) but clear
PSL_FE0 and PSL_FE1 so that the FP execption mode is changes to ignore.
This will prevent spurious FP exceptions being made when the running lwp
doesn't own the FPU.
 2004-04-04 16:47:02 +00:00
kochi
ee2683e797 Support for PIRQ[E-H], found in recent intel south bridges 
(ICH2 and later), which fixes PR/23700.
The changes are from Hiroyuki Bessho and Masanori Kanaoka in PR/23700
with a little modification of interrupt router lookup from mine.
 2004-04-04 16:06:09 +00:00
mrg
625248bde9 install ippool(5) manual as well. from peter postma in PR#25053. 2004-04-04 15:59:44 +00:00