external/cddl/osnet/sys/sys/kcondvar.h: revision 1.5
zfs: Give condvars more meaningful names.
These will be truncated to 16 characters, but hey, better'n `zfscv'.
sys/dev/usb/umodeswitch.c: revision 1.6
Add support for D-Link DWM-222 4G LTS USB adapter
Oddly, the fake umass device does not detach after umodeswitch does
its duty, but functionality is there, thanks to five u3g devices that
attach. u3g devices 0, 3 and 4 does not seem to accept AT commands.
u3g devices 1 and 2 are fine to be used as modems.
sys/dev/ic/rtl81x9var.h: revision 1.58
sys/dev/ic/rtl81x9reg.h: revision 1.54
sys/dev/ic/rtl8169.c: revision 1.167
sys/dev/ic/rtl8169.c: revision 1.168
re(4): misc chip revision support changes
* remove impossible-to-match chip revision cases
* bring support for modern chips in line with FreeBSD and OpenBSD
* adds support for RTL8168GU
Addresses PR kern/56312.
- Print chip revision. From OpenBSD.
- Rename RTK_HWREV_8168_SPIN[123] to RTK_HWREV_8168'B'_SPIN[123].
Same as other *BSDs.
- Rename RTK_HWREV_8168G_SPIN4 to RTK_HWREV_8411B. Same as other *BSDs.
- Add definition of RTK_HWREV_8169_8110SCE.
sys/netinet6/in6.c: revision 1.289
sys/netinet6/ip6_output.c: revision 1.234
in6: clear ND6_IFF_IFDISABLED to allow DAD again on link-up
in6: don't send any IPv6 packets over a disabled interface
sys/netinet6/in6_src.c: revision 1.92
in6: add missing rtcache_unref to in6_selectroute
By default, this issue is harmless. However, if NET_MPSAFE
is enabled, it could eventually lead to a kernel panic.
sys/fs/ptyfs/ptyfs_vnops.c: revision 1.61
PR/55821: tar can not extract base.tgz anymore (./dev/pts and mounted ptyfs)
Allow chown/chmod at the root of ptyfs.
lib/libpthread/arch/x86_64/pthread_md.h: revision 1.13
lib/libpthread/pthread_int.h: revision 1.110
lib/libpthread/pthread_int.h: revision 1.111
lib/libpthread/arch/i386/pthread_md.h: revision 1.21
lib/libpthread/arch/arm/pthread_md.h: revision 1.12
lib/libpthread/arch/arm/pthread_md.h: revision 1.13
lib/libpthread/pthread_spin.c: revision 1.11
lib/libpthread/arch/aarch64/pthread_md.h: revision 1.2
libpthread: Use __nothing, not /* nothing */, for empty macros.
No functional change intended -- just safer to do it this way in case
the macros are used in if branches or comma expressions.
PR port-arm/57437 (pthread__smt_pause/wake issue)
libpthread: New pthread__smt_wait to put CPU in low power for spin.
This is now distinct from pthread__smt_pause, which is for spin lock
backoff with no paired wakeup.
On Arm, there is a single-bit event register per CPU, and there are two
instructions to manage it:
- wfe, wait for event -- if event register is clear, enter low power
mode and wait until event register is set; then exit low power mode
and clear event register
- sev, signal event -- sets event register on all CPUs (other
circumstances like interrupts also set the event register and cause
wfe to wake)
These can be used to reduce the power consumption of spinning for a
lock, but only if they are actually paired -- if there's no sev, wfe
might hang indefinitely. Currently only pthread_spin(3) actually
pairs them; the other lock primitives (internal lock, mutex, rwlock)
do not -- they have spin lock backoff loops, but no corresponding
wakeup to cancel a wfe.
It may be worthwhile to teach the other lock primitives to pair
wfe/sev, but that requires some performance measurement to verify
it's actually worthwhile. So for now, we just make sure not to use
wfe when there's no sev, and keep everything else the same -- this
should fix severe performance degredation in libpthread on Arm
without hurting anything else.
No change in the generated code on amd64 and i386. No change in the
generated code for pthread_spin.c on arm and aarch64 -- changes only
the generated code for pthread_lock.c, pthread_mutex.c, and
pthread_rwlock.c, as intended.
PR port-arm/57437
(requested by riastradh in ticket #1699):
distrib/sets/lists/tests/shl.mi: revision 1.14
distrib/sets/lists/tests/shl.mi: revision 1.15
distrib/sets/lists/tests/shl.mi: revision 1.16
tests/libexec/ld.elf_so/helper_def_static/h_def_static.c: revision 1.1
tests/libexec/ld.elf_so/helper_def_dynamic/Makefile: revision 1.1
tests/libexec/ld.elf_so/helper_def_dynamic/Makefile: revision 1.2
tests/libexec/ld.elf_so/helper_onlyuse_static/Makefile: revision 1.1
tests/libexec/ld.elf_so/helper_onlyuse_static/Makefile: revision 1.2
libexec/ld.elf_so/arch/mips/mips_reloc.c: revision 1.75
distrib/sets/lists/tests/mi: revision 1.1265
libexec/ld.elf_so/arch/sh3/mdreloc.c: revision 1.36
libexec/ld.elf_so/rtld.c: revision 1.214
tests/libexec/ld.elf_so/helper_onlydef_static/Makefile: revision 1.1
distrib/sets/lists/debug/mi: revision 1.400
tests/libexec/ld.elf_so/helper_onlydef_static/Makefile: revision 1.2
distrib/sets/lists/debug/mi: revision 1.401
distrib/sets/lists/debug/mi: revision 1.402
tests/libexec/ld.elf_so/helper_dso2/Makefile: revision 1.2
distrib/sets/lists/debug/mi: revision 1.403
tests/libexec/ld.elf_so/helper_symver_dso0/Makefile: revision 1.2
libexec/ld.elf_so/arch/x86_64/mdreloc.c: revision 1.48
distrib/sets/lists/debug/mi: revision 1.406
tests/libexec/ld.elf_so/helper_use_dynamic/Makefile: revision 1.1
tests/libexec/ld.elf_so/helper_use_dynamic/Makefile: revision 1.2
tests/libexec/ld.elf_so/helper_ifunc_dso/Makefile: revision 1.2
libexec/ld.elf_so/arch/sparc64/mdreloc.c: revision 1.70
libexec/ld.elf_so/arch/aarch64/mdreloc.c: revision 1.18
tests/libexec/ld.elf_so/helper_abuse_dynamic/Makefile: revision 1.1
tests/libexec/ld.elf_so/helper_abuse_dynamic/Makefile: revision 1.2
tests/libexec/ld.elf_so/Makefile: revision 1.13
libexec/ld.elf_so/arch/arm/mdreloc.c: revision 1.46
libexec/ld.elf_so/rtld.h: revision 1.146
tests/libexec/ld.elf_so/Makefile: revision 1.14
distrib/sets/lists/debug/shl.mi: revision 1.306
tests/libexec/ld.elf_so/Makefile: revision 1.15
tests/libexec/ld.elf_so/helper_abuse_static/Makefile: revision 1.1
distrib/sets/lists/debug/shl.mi: revision 1.307
tests/libexec/ld.elf_so/Makefile: revision 1.16
tests/libexec/ld.elf_so/helper_abuse_static/Makefile: revision 1.2
distrib/sets/lists/debug/shl.mi: revision 1.308
tests/libexec/ld.elf_so/Makefile: revision 1.17
distrib/sets/lists/debug/shl.mi: revision 1.309
tests/libexec/ld.elf_so/Makefile: revision 1.18
tests/libexec/ld.elf_so/Makefile: revision 1.19
libexec/ld.elf_so/tls.c: revision 1.16
libexec/ld.elf_so/tls.c: revision 1.17
libexec/ld.elf_so/tls.c: revision 1.18
libexec/ld.elf_so/tls.c: revision 1.19
tests/libexec/ld.elf_so/helper_onlydef_static/h_onlydef_static.c: revision 1.1
tests/libexec/ld.elf_so/helper_use_static/h_use_static.c: revision 1.1
tests/libexec/ld.elf_so/helper_use_static/h_use_static.c: revision 1.2
tests/libexec/ld.elf_so/helper_def_static/Makefile: revision 1.1
tests/libexec/ld.elf_so/helper_def_static/Makefile: revision 1.2
libexec/ld.elf_so/arch/hppa/hppa_reloc.c: revision 1.50
distrib/sets/lists/debug/shl.mi: revision 1.310
libexec/ld.elf_so/README.TLS: revision 1.6
distrib/sets/lists/debug/shl.mi: revision 1.311
distrib/sets/lists/debug/shl.mi: revision 1.314
tests/libexec/ld.elf_so/helper_dso3/Makefile: revision 1.2
tests/libexec/ld.elf_so/helper_symver_dso1/Makefile: revision 1.4
libexec/ld.elf_so/arch/powerpc/ppc_reloc.c: revision 1.63
tests/libexec/ld.elf_so/helper_def_dynamic/h_def_dynamic.c: revision 1.1
tests/libexec/ld.elf_so/helper_onlydef/Makefile: revision 1.1
tests/libexec/ld.elf_so/helper_onlydef/Makefile: revision 1.2
tests/libexec/ld.elf_so/t_tls_extern.c: revision 1.10
tests/libexec/ld.elf_so/t_tls_extern.c: revision 1.11
tests/libexec/ld.elf_so/t_tls_extern.c: revision 1.12
libexec/ld.elf_so/map_object.c: revision 1.66
tests/libexec/ld.elf_so/helper.mk: revision 1.1
libexec/ld.elf_so/arch/sparc/mdreloc.c: revision 1.57
libexec/ld.elf_so/map_object.c: revision 1.67
tests/libexec/ld.elf_so/helper_onlydef/h_onlydef.c: revision 1.1
tests/libexec/ld.elf_so/helper_symver_dso2/Makefile: revision 1.4
tests/libexec/ld.elf_so/helper_use_static/Makefile: revision 1.1
tests/libexec/ld.elf_so/helper_use_static/Makefile: revision 1.2
tests/libexec/ld.elf_so/helper_use_static/Makefile: revision 1.3
tests/libexec/ld.elf_so/helper_use_dynamic/h_use_dynamic.c: revision 1.1
tests/libexec/ld.elf_so/helper_abuse_static/h_abuse_static.c: revision 1.1
libexec/ld.elf_so/arch/riscv/mdreloc.c: revision 1.9
tests/libexec/ld.elf_so/t_tls_extern.c: revision 1.1
tests/libexec/ld.elf_so/t_tls_extern.c: revision 1.2
tests/libexec/ld.elf_so/t_tls_extern.c: revision 1.3
tests/libexec/ld.elf_so/t_tls_extern.c: revision 1.4
tests/libexec/ld.elf_so/helper_onlyctor_dynamic/Makefile: revision 1.1
tests/libexec/ld.elf_so/t_tls_extern.c: revision 1.5
tests/libexec/ld.elf_so/t_tls_extern.c: revision 1.6
libexec/ld.elf_so/arch/m68k/mdreloc.c: revision 1.34
tests/libexec/ld.elf_so/helper_onlyctor_dynamic/Makefile: revision 1.2
tests/libexec/ld.elf_so/t_tls_extern.c: revision 1.7
libexec/ld.elf_so/arch/i386/mdreloc.c: revision 1.42
tests/libexec/ld.elf_so/t_tls_extern.c: revision 1.8
libexec/ld.elf_so/arch/i386/mdreloc.c: revision 1.43
libexec/ld.elf_so/arch/or1k/mdreloc.c: revision 1.4
tests/libexec/ld.elf_so/t_tls_extern.c: revision 1.9
tests/libexec/ld.elf_so/helper_onlyuse_dynamic/Makefile: revision 1.1
tests/libexec/ld.elf_so/helper_onlyuse_dynamic/Makefile: revision 1.2
tests/libexec/ld.elf_so/helper_abuse_dynamic/h_abuse_dynamic.c: revision 1.1
tests/libexec/ld.elf_so/helper_onlyctor_dynamic/h_onlyctor_dynamic.c: revision 1.1
tests/libexec/ld.elf_so/helper_onlyuse_static/h_onlyuse_static.c: revision 1.1
tests/libexec/ld.elf_so/helper_onlyuse_dynamic/h_onlyuse_dynamic.c: revision 1.1
tests/libexec/ld.elf_so/helper_dso1/Makefile: revision 1.2
distrib/sets/lists/tests/shl.mi: revision 1.12
distrib/sets/lists/tests/shl.mi: revision 1.13
libexec/ld.elf_so/arch/alpha/alpha_reloc.c: revision 1.44
ld.elf_so: New test for extern initial-exec TLS, PR toolchain/50277.
ld.elf_so: Fix extern TLS test to match PR toolchain/50277.
Now it's actually testing the problem.
ld.elf_so: Nix inadvertently committed private test program.
ld.elf_so: Fix set lists for MKDEBUG=yes builds with t_tls_extern.
ld.elf_so: Sprinkle tls debug messages.
ld.elf_so: Make tls alloc debug messages more detailed and greppable.
ld.elf_so: Test variations on PR toolchain/50277.
ld.elf_so: Test extern dynamic TLS too.
ld.elf_so: Factor out logic in TLS tests to make writing more easier.
No functional change intended.
ld.elf_so: Test TLS abuse of static def, dynamic use and vice versa.
ld.elf_so: Shorter test names.
No functional non-cosmetic change intended.
ld.elf_so: Separately test eager and lazy resolution of def tls ptr.
eager: before loading use library
lazy: after loading use library
Add recent ld.elf_so test helpers debug info
ld.elf_so: Add new files to debug/shl.mi.
ld.elf_so: tls_extern dynamic_defabuse_eager must xfail differently.
If a symbol has already been resolved as dynamic TLS, any library
that tries to use it as static TLS cannot be dlopened.
ld.elf_so: Test another edge case of mismatched TLS models.
One library defines a symbol and _doesn't_ use it, so it has no
indication of whether the symbol is for static TLS or dynamic TLS,
and then two other libraries use it in different ways.
ld.elf_so: Test dynamic-then-static abuse via ctor.
ld.elf_so: Fix missing tab in debug/shl.mi in last change.
Fix interactions of initial-exec TLS model and dlopen
(1) If an initial-exec relocation was used for a non-local symbol
(i.e. the definition of the symbol is in a different DSO), the
computation of the static TLS offset used the wrong DSO.
This would effectively mean the wrong address was computed
(PR toolchain/50277, PR pkg/57445).
Fix this by forcing the computation of the correct DSO (the one defining
the symbol).
This code uses __UNCONST to avoid the vast interface changes for this
special case.
(2) If symbols from a DSO loaded via dlopen are used with both
global-dynamic/local-dynamic and initial-exec relocations AND
a initial-exec relocation was resolved first in a thread, a split brain
situation could exist where the dynamic relocations would use one memory
block (separate allocation) and the initial-exec relocations the static
per-thread TLS space.
(3) If the initial-exec relocation in (2) is seen after any thread has
already used a GD/LD allocation, bail out. Since IE relocations are used
only in the GOT, this will prevent the dlopen. This is a bit more
aggressive than necessary, but a full blown reference counting doesn't
seem to be justified.
Avoid using uninitialized variable "symnum" when building with DEBUG
enabled by borrowing the rdbg_symname() macro from arch/x86_64.
ld.elf_so: Sprinkle more debug messages on dlopen and error.
PR pkg/57445
Fix MKDEBUGLIB build by adding these installed files to the debug
set list.
One could argue that these files are not of any use, so why install
them? I don't have a good argument either way, and this is (for
now) a simple work-around for PR bin/57455 Please feel free to
commit a different fix to avoid installing these files at all.
Fix markup of libh_ MKDEBUGLIB=yes only files
TLS variant I archs need to fudge the offset by the size of the TCB.
tests/libexec/ld.elf_so: Fix helper library makefiles.
1. Consolidate logic into a single helper.mk to reduce duplication.
2. Set NO* variables, not MK* variables which are reserved for user.
3. Avoid eager X!= in favour of lazy ${X:sh}.
4. Mark _g.a set list entries obsolete. Never should've been built!
PR misc/57462
sys/dev/usb/ehci.c: revision 1.317
PR 57518: usb keyboard causes host controller to miss microframe
As per the USB 2.0 specification section 11.18.4; paragraph 3.b
For interrupt IN/OUT full-/low-speed transactions, the host must schedule a
complete-split transaction in each of the two microframes following the
first microframe in which the full-/low-speed transaction is budgeted. An
additional complete-split must also be scheduled in the third following
microframe unless the full-/low-speed transaction was budgeted to start
in microframe Y6.
usr.sbin/tprof/tprof.8 1.16,1.22,1.25,1.29 via patch
usr.sbin/tprof/tprof_analyze.c 1.4
usr.sbin/tprof/arch/tprof_x86.c 1.13-1.19
sys/dev/tprof/tprof.c 1.23 via patch
sys/dev/tprof/tprof_x86_amd.c 1.7-1.8 via patch
sys/dev/tprof/tprof_x86_intel.c 1.8 via patch
- Add AMD family 19h (zen3 and zen4) support.
- Add Intel Comet Lake support.
- Add support for Intel Skylake-X and Cascade Lake.
- Print the path that we failed to open on error.
- Use lowercase consistently for hexadecimal numbers.
- KNF
sys/external/bsd/drm2/linux/linux_ww_mutex.c: revision 1.15
drm/linux_ww_mutex: Fix wait loops.
If cv_wait_sig returns because a signal is delivered, we may
nonetheless have been granted the lock. It is harmless for us to
ignore this fact in three of the four paths, but in
ww_mutex_state_wait_sig, we may now have ownership of the lock and
MUST NOT return failure because the caller MUST release the lock
before destroying the ww_acquire_ctx.
While here, restructure the other three loops for clarity, so they
match the structure of the fourth and so they have a little less
impenetrable negation.
PR kern/57537
sys/fs/tmpfs/tmpfs_subr.c: revision 1.116
sys/fs/tmpfs/tmpfs_subr.c: revision 1.117
tmpfs: Refuse sizes that overflow round_page.
tmpfs: Assert no arithmetic overflow in directory node tn_size.
Need >2^57 directory entries before this is a problem. If we created
a million per second, this would take over 4000 years.
sys/kern/subr_autoconf.c: revision 1.308
autoconf(9): Avoid potential ABA bug in config_makeroom.
When we unlock alldevs_lock to allocate a new cd_devs array nsp,
other threads may have:
1. freed the old one (osp),
2. done some other memory allocation,
3. allocated a new _larger_ array whose address happens to concide
with osp (e.g., in (2) the page was recycled for a different pool
cache), and
4. updated cd_devs back to osp but increased cd_ndevs.
In that case, the memory may be corrupted: we try to copy the wrong
number of device_t pointers into nsp and we free osp with the wrong
(stale) length.
Avoid this by checking whether cd_ndevs has changed too -- if not,
osp might have been recycled but at least the lengths we're about to
copy and free are still correct so there's no harm in an ABA
situation.
sys/dev/usb/xhci.c: revision 1.176
sys/dev/usb/xhcivar.h: revision 1.23
xhci(4): Defer root intr xfers while polling.
Root intr xfers require taking adaptive locks, which is forbidden
while polling.
This is not great -- any USB transfer completion callbacks might try
to take adaptive locks, not just uhub_intr, and that will always
causes trouble. We get lucky with ukbd_intr because it's not
MP-safe, so it relies only on the kernel lock (a spin lock) anyway.
But this change brings xhci in line with ehci.
PR kern/57326
sys/arch/alpha/include/asm.h: revision 1.45 (patch)
(also applied to locore.s and multiproc.s)
alpha: Add missing barriers in cpu_switchto.
Details in comments.
(accidently missed in original commit for ticket #264)
sys/kern/uipc_domain.c: revision 1.109
sockaddr_alloc(9): Avoid uninitialized buffer in sockaddr_checklen.
Manifests only under DIAGNOSTIC because the DIAGNOSTIC check itself
uses an uninitialized buffer.
sys/netatalk/at_control.c: revision 1.44
atalk(4): Don't let userland control sa_len when adding addresses.
- The struct sockaddr_at object accessed by at_ifinit always comes
from an ioctl buffer that is adequately sized and fully initialized
from userland memory.
- The newly created sockaddr_at object is later used with
sockaddr_copy, which requires sa_len to be correctly initialized.
- sa_len is not generally required to be correctly initialized by
userland in most entry points (with some exceptions, e.g. gif(4)
configuration).
I don't know whether existing userland programs initialize sa_len
correctly; if they do, we can verify it matches sizeof(struct
sockaddr_at), but there's no need to copy sa_len then if it is
verified to be that fixed value.
lib/libc/sys/mremap.2: revision 1.8
mremap(2): Fix example to use MAP_PRIVATE.
It is a historical accident that MAP_PRIVATE is assumed when neither
it nor MAP_SHARED is specified.
sys/arch/xen/x86/hypervisor_machdep.c: revision 1.46 (patch)
xen/x86: Need kpreempt_disable/enable around curcpu() access.
This is called with `hardware' interrupts enabled (between sti and
cli), so presumably preemption is possible here.
sys/arch/xen/x86/xen_intr.c: revision 1.31
xen_intr.c: Use kpreempt_disable/enable around access to curcpu().
curcpu() is not otherwise guaranteed to be stable at these points.
While here, nix nonsensical membars. This need only be synchronized
with interrupts on the same CPU.
Proposed on port-xen:
https://mail-index.netbsd.org/port-xen/2022/07/13/msg010250.html
sys/kern/kern_rwlock.c: revision 1.68 (patch)
rwlock(9): Fix membars.
rw_downgrade must be a release operation, and rw_tryupgrade must be
an acquire operation. membar_producer is not enough -- need to use
membar_release and membar_acquire.
Discussed on tech-kern:
https://mail-index.netbsd.org/tech-kern/2023/02/22/msg028726.html
sys/arch/ia64/ia64/vm_machdep.c: revision 1.18
sys/arch/powerpc/powerpc/locore_subr.S: revision 1.67
sys/arch/aarch64/aarch64/locore.S: revision 1.91
sys/arch/mips/include/asm.h: revision 1.74
sys/arch/hppa/include/cpu.h: revision 1.13
sys/arch/arm/arm/armv6_start.S: revision 1.38
sys/arch/evbmips/ingenic/cpu_startup.S: revision 1.2
sys/arch/mips/mips/locore.S: revision 1.229
sys/arch/aarch64/aarch64/cpuswitch.S: revision 1.40
sys/arch/alpha/include/asm.h: revision 1.45
sys/arch/sparc64/sparc64/locore.s: revision 1.432
sys/arch/vax/vax/subr.S: revision 1.42
sys/arch/mips/mips/locore_mips3.S: revision 1.116
sys/arch/ia64/ia64/machdep.c: revision 1.44
sys/arch/arm/arm32/cpuswitch.S: revision 1.106
sys/arch/sparc/sparc/locore.s: revision 1.284
(all via patch)
aarch64: Add missing barriers in cpu_switchto.
Details in comments.
Note: This is a conservative change that inserts a barrier where
there was a comment saying none is needed, which is probably correct.
The goal of this change is to systematically add barriers to be
confident in correctness; subsequent changes may remove some bariers,
as an optimization, with an explanation of why each barrier is not
needed.
PR kern/57240
alpha: Add missing barriers in cpu_switchto.
Details in comments.
arm32: Add missing barriers in cpu_switchto.
Details in comments.
hppa: Add missing barriers in cpu_switchto.
Not sure hppa has ever had working MULTIPROCESSOR, so maybe no
pullups needed?
ia64: Add missing barriers in cpu_switchto.
(ia64 has never really worked, so no pullups needed, right?)
mips: Add missing barriers in cpu_switchto.
Details in comments.
powerpc: Add missing barriers in cpu_switchto.
Details in comments.
sparc: Add missing barriers in cpu_switchto.
sparc64: Add missing barriers in cpu_switchto.
Details in comments.
vax: Note where cpu_switchto needs barriers.
Not sure vax has ever had working MULTIPROCESSOR, though, and I'm not
even sure how to spell store-before-load barriers on VAX, so no
functional change for now.
lib/csu/arch/vax/crtbegin.S: revision 1.8
lib/csu/arch/vax/crtbegin.S: revision 1.9
vax/csu: __do_global_ctors_aux: Save actually-used r8, instead of r11
Thanks Kalvis Duckmanton for report and patch on tech-toolchain:
https://mail-index.netbsd.org/tech-toolchain/2023/07/28/msg004321.html
vax/csu: Use register name provided by asm.h. No binary changes.
sys/arch/mips/cavium/dev/octeon_rnm.c: revision 1.16 (patch)
octrnm(4): Raise delay on startup.
According to CN50XX-HRM-V0.99E and CN78XX-HM-0.99E:
The entropy is provided by the jitter of 125 of 128 free-running
oscillators XORed into a 128-bit LFSR. The LFSR accumulates entropy
over 81 cycles, after which it is fed into a SHA-1 engine.
[...]
The SHA-1 engine runs once every 81 cycles.
[...]
The hardware produces new 64-bit random number every 81 cycles.
The last sentence means that we only need to wait 81 cycles _between_
consecutive SHA-1 outputs (which isn't relevant anyway because we
reconfigure it into raw mode later), but the first two quotes might
mean that we need to wait 81+81 cycles for the _first_ output to be
produced on boot when running the self-test.
Now, in this case, the self-test is run with the LFSR unhooked, by
clearing the RNM_CTL_STATUS[ENT_EN] bit, so that SHA-1 is computed
from a known input -- this is really just paranoia to make sure that
_some_ functions of the device (which is conjured out of thin air at
a fixed virtual address, with no firmware bindings to guide us)
behave as we expect.
And it's not clear if it really does take 81+81 cycles for the first
SHA-1 output to appear when the LFSR isn't feeding into it anyway.
But experimentally, delay of 81+81 cycles seems to work whereas a
delay of only 81 cycles crashes.
PR kern/57280
sys/arch/x86/x86/coretemp.c: revision 1.38-1.39 (patch)
coretemp(4): Change limits of Tjmax.
- Change the lower limit from 70 to 60. At least, some BIOSes can change
the value down to 62.
- Change the upper limit from 110 to 120. At least, some BIOSes can change
the value up to 115.
- Print error message when rdmsr(TEMPERATURE_TARGET) failed.
- When Tjmax exceeded the limit, print warning message and use the value
as it is.
- KNF.
ticket #1672:
sys/dev/pci/ichsmb.c 1.83-1.84
- Add support Intel 700 series chipset and Alder Lake-N devices.
- Use device_printf() instead of aprint_error_dev() in
ichsmb_i2c_exec().
martin