Commit Graph

93 Commits

Author SHA1 Message Date
msaitoh
74aebcc5ae Exclude descriptor 0xff of CPUID leaf 2. 0xff means the cacheinfo is in leaf 4. 2014-07-03 04:11:37 +00:00
msaitoh
cb672750d7 If -v is set and unknown cacheinfo desc is found, print it. 2014-05-27 04:18:00 +00:00
szptvlfn
4893e5b805 Update URL 2014-02-19 09:13:21 +00:00
msaitoh
e84a097d09 - Rename x86_print_cacheinfo() to x86_print_cache_and_tlb_info() because
this function prints TLB info, too.
- Remove an extra printf when verbose flag is set.
- Print the highest extended info level as the basic info level.
- Sort function.
2014-01-04 18:13:48 +00:00
wiz
3acb5aa34e Use more common phrasing. 2013-12-23 12:39:55 +00:00
msaitoh
e05de3375f Add verbose flag.
On x86 cpu, cpuctl -v identify dumps the return values of the cpuid
functions. The max levels are taken from CPUID 0 and CPUID 8000_0000.
It's useful for the future CPU.
2013-12-23 12:35:33 +00:00
msaitoh
2620370891 CPUID leaf 2 and 4 are only for Intel processors. 2013-12-23 11:17:20 +00:00
msaitoh
1c10986642 Add comments. Remove comments. No functional change. 2013-12-23 10:13:59 +00:00
msaitoh
b1a32cacda Modify some macros and add some new macros for CPU family and model
to reduce code duplication and to avoid bug.

CPUID_TO_STEPPING(cpuid)	(not changed)

CPUID_TO_FAMILY(cpuid)		(new)
CPUID_TO_MODEL(cpuid)		(new)

	Return the display family and the display model.
	The macro names are the same as FreeBSD.

CPUID_TO_BASEFAMILY(cpuid)	(The old name was CPUID2FAMILY)
CPUID_TO_BASEMODEL(cpuid)	(The old name was CPUID2MODEL)

	Only for the base field.

CPUID_TO_EXTFAMILY(cpuid)	(The old name was CPUID2EXTFAMILY)
CPUID_TO_EXTMODEL(cpuid)	(The old name was CPUID2EXTMODEL)

	Only for the extended field.

See http://mail-index.netbsd.org/port-amd64/2013/11/12/msg001978.html
2013-11-15 08:47:55 +00:00
msaitoh
3b5f820d76 Fix typo. From jnemeth. 2013-11-07 18:59:01 +00:00
msaitoh
a9491a8185 Update some processor names. 2013-11-07 18:18:59 +00:00
mrg
ea1cef97af avoid uninitialised variable use. 2013-10-30 08:42:16 +00:00
msaitoh
c622541618 Support prefetch size. 2013-10-28 05:41:49 +00:00
msaitoh
ea7bd36351 Check cpuid leaf 4 for newer Intel CPU to know the cache information. 2013-10-21 06:33:11 +00:00
msaitoh
0380541841 No functional change:
- Add prototypes.
- Make some function static.
- Sort functions.
2013-10-21 06:28:15 +00:00
msaitoh
4713a86712 Fix typo in comment (s/XRC0/XCR0/). 2013-10-04 17:12:48 +00:00
msaitoh
13add5607a Add shared TLB.
KNF.
2013-09-14 17:23:18 +00:00
msaitoh
993b96e7e8 Update Intel processors' brand names and model names (e.g. Atom C2000 and
E3000) from the latest document.
2013-09-13 06:21:43 +00:00
matt
edba670894 .include <bsd.own.mk> to get MACHINE_CPU 2013-08-01 23:19:39 +00:00
msaitoh
c148f0440f Update Intel's Processor Family Names of family == 6 from the latest document.
Add 0x35(Atom), 0x36(Atom S), 0x3f(future Xeon), 0x46(Haswell) and update some
models.
2013-07-16 09:54:30 +00:00
yamt
7f82ee6f97 print some more bits 2013-03-06 11:52:53 +00:00
matt
9ac4c42034 Add arm support for cpuctl identify 2013-01-31 23:40:48 +00:00
matt
c4936fc4a0 Only complain about binding if we have more than 1 cpu. :)
(we always have more than 0).
2013-01-31 19:47:59 +00:00
dsl
58b5bd2463 Add support for the xsave related data from cpuid 8.n.
Reorder the output so that the 'brand' string - which actually identifies
  the cpu is output first.
2013-01-07 23:20:42 +00:00
dsl
6d15685a79 Use full model number to index name strings - a lot of 256 element arrays
don't matter in usespace.
Update list of intel family 6 model names (all current cpus) to include
everything upto and including sandy bridge and ivy bridge.
My i7 is no longer reported as a random P II.
2013-01-06 23:17:35 +00:00
dsl
cbb941ff11 The Intel and AMD docs (more or less) agree on how the cpuid 'extended
family' and 'extended model' bits are used to create larger values
  than the original 16bit value allowed for.
Calculate and save these values 'up-front' and use them throughout.
Untangle the (backwards) nested switch statement for amd 'model 15' cpus.
Works as badly as ever on my i7.
2013-01-05 21:16:22 +00:00
dsl
cd90dce7d6 If the IOC_CPU_UCODE_GET_VERSION fails with ENOTTY, try issuing the
request that the amd64 kernel understands.
2013-01-05 16:38:12 +00:00
dsl
ef07d271f5 Fix x86_identify() for amd64 2013-01-05 15:33:00 +00:00
dsl
7d87936626 Change the i386 asm x86_identify() so it returns a value instead of writing
into global data.
Fix a stack alignment fubar that would cause a crash on a cirix 486.
Refactor identify code to common setup for normal identify and ucode
identify - which was missing a memset().
2013-01-05 15:27:45 +00:00
dsl
438bdb2a64 #include sys/ioctl.h 2013-01-02 19:24:30 +00:00
drochner
16e95cd0dc avoid dummy structure definition, include a system header instead,
looks just cleaner
2012-10-17 20:22:15 +00:00
drochner
629e6fc4b6 fix for archs w/o cpu ucode driver: add dummy definition 2012-08-31 07:27:27 +00:00
drochner
312c339026 Extend the CPU microcode update framework to support Intel x86 CPUs.
Contrary to the AMD implementation, it doesn't use xcalls to distribute
the update to all CPUs but relies on cpuctl(8) to bind itself to the
right CPU -- to keep it simple and avoid possible problems with
hyperthreading.
Also, it doesn't parse the vendor supplied file to pick the right
part for the present CPU model but relies on userland to prepare
files with specific filenames. I'll commit a pkg for this in a minute
(pkgsrc/sysutils/intel-microcode).
The ioctl interface changed; compatibility is provided (should be
limited to COMPAT_NETBSD6 as soon as this is available).
2012-08-29 17:13:21 +00:00
cegger
3f7c493abc print cpu family for AMD CPU families 0x12 - 0x15 2012-04-17 13:00:09 +00:00
cegger
135e6a1977 report l3 cache information on AMD Family 10h and newer processors 2012-04-05 11:05:53 +00:00
njoly
d0e00679ff Use Lk macro when dealing with URLs. While here update or remove some
dead URL links. Another part of PR/29238.
2012-03-15 22:35:02 +00:00
joerg
66dd2755f5 Add __printflike attribution to use vprintf and friends with an argument
as format string.
2012-03-15 02:02:20 +00:00
sborrill
079328a547 Print CPU stepping level 2012-03-02 16:29:31 +00:00
joerg
dfa4e075c4 Use uintmax_t for freqency computations to avoid differences between
platforms.
2012-02-29 23:34:01 +00:00
yamt
e119700586 use a correct macro.
releng@ ok
2012-02-03 05:06:51 +00:00
wiz
ee2d01f9ba Sort sections. Uppercase CPU. 2012-01-14 00:59:56 +00:00
cegger
a3f6c06746 Support CPU microcode loading via cpuctl(8).
Implemented and enabled via CPU_UCODE kernel config option
for x86 and Xen Dom0.
Tested on different AMD machines with different
CPU families.

ok wiz@ for the manpages
ok releng@
ok core@ via releng@
2012-01-13 16:05:14 +00:00
chs
b364697460 add info on L2 TLBs and 1GB pages. 2011-12-04 17:00:10 +00:00
jruoho
be8b5eb28c Define _PATH_CPUCTL. 2011-09-27 11:24:20 +00:00
jruoho
cb6e031ff5 Fix wrong err(3) message (no such thing as IOC_CPU_GETINFO). 2011-09-26 06:51:57 +00:00
jdc
f8dbae1d18 Add a cs_hwid field to cpustate and use this to store the ci_cpuid (hardware
ID).  Report this as the HwID in cpuctl.
OK jruoho@.
2011-09-11 14:54:49 +00:00
joerg
19f8b044c9 static + __dead 2011-08-27 22:38:48 +00:00
jruoho
7b594ad6a4 Identify AMD Family 11h. From PR bin/41188 by FUKAUMI Naoki. 2011-05-03 09:06:22 +00:00
jmcneill
623e90f32d fix printing of padlock features 2011-02-19 13:34:38 +00:00
cegger
473a16d6eb beautify printing of SVM features across multiple lines 2010-12-15 17:09:07 +00:00