fault-status reading stubs pre-cook the arguments.
illegal instruction trap: catch iflush instructions that cause this trap
on some CPU/MMU combinations.
Call get_cpuinfo() for the boot CPU to collect the minimum information
to get the bootstrap rolling.
sun4/sun4c: the Interrupt Enable register is now mapped here after pmap
is initialized (was in locore).
Replace `cpumod' and `mmumod' with `cpuinfo.*' equivalents.
Allow more than one CPU to be configured in mainbus_attach().
Many things in here were imported from an earlier version from Aaron
Brown and are not yet used. This version has all the attributes of a
snapshot; more to come as addtional CPU/MMU details get implemented.
Use a table driven classification based on CPU and MMU implementation/version
fields. Each CPU class or module defines a collection of routines that
implement CPU or MMU specific operations that can collect detailed setup
information.
All information is collected in a `cpu_softc' structure provided by the
auto-configuration code. However, in the interest of SMP support this
structure is located at a fixed virtual address identified by the
symbol `cpuinfo'. The `boot' CPU currently uses the the physical page(s) at
address 0x2000 for its cpuinfo. Consequently, the fixed virtual address
will be `KERNBASE+0x2000'.
The cache flush routines for several systems (sun4/4c vs. sun4m;
virtual vs. physical tags) have been factored out. Function pointers
to an appropriate set are located in `cpuinfo'. The former global
`cacheinfo' structure is now also a part of `cpuinfo'. Because of the
fixed virtual address of `cpuinfo' no extra performance penalties
are incurred by this move. In multi-architecture kernels, there's
no longer the need for run-time `cputyp' tests in this part of the system.
some at startup depending on architecture.
Use `get_faultstatus' field in `cpuinfo' (initialized in cpu.c) to branch
to CPU/MMU specific fault status reading stubs on memory fault traps.
Remove code top map the Interrupt Enable register on sun4/sun4c. Its VA
has moved to a high location and is now mapped in autoconf.c after
pmap has initialized. Note: this renders NMIs during bootstrap() fatal
(maybe loading %tbr should be deferred).
- vcache_flush_*() routines.
- cpu_type/cpu_flags
- per cpu context table and context administration glue.
- different macros to enable sun4/3-level mmu support.
Simplify sun4m version of pmap_bootstrap() a bit; more to do still.
Move installation of page tables in MMU into a separate routine, in
anticipation for SMP.
the base address. This allows for a more flexible layout of buffers
in the Lance's memory.
- Add a new element 'sc_saved_csr0' to am7990_softc. It's value is or-ed
with the current csr0 value in the am7990_intr() function. This allowes
for a 'deferred' interrupt sceme.
allow the PROM monitor to see mappings in kernel space. This also
fixes a problem with exiting to the monitor with the stack pointer
set to some place in kernel space. Also fix NUM_KERN_PTES, and
change get_pte() so it works on any virtual address.
