d750508a87
Hook the error interrupt only once, otherwise we'd fail when hooking
...
the interrupt for the 2nd DRAM board where two boards are present.
2001-07-28 08:30:23 +00:00
27ae3aab7c
Blah, yet another nit: s/irq/ipl/
2001-07-27 21:56:10 +00:00
ea00e7cda2
Don't bother trying to initiate a DRAM scrub on startup as it requires
...
frobbing with registers which are marked as "For Test Purposes [only]".
2001-07-27 21:54:07 +00:00
c184f03348
Remove Mistakenly Left In comments around some `#ifdef DIAGNOSTIC' tests.
2001-07-27 20:48:58 +00:00
8343a1492f
Forgot to shift the DRAM Bank identifiers by four.
2001-07-27 20:33:35 +00:00
7e2f2acb8e
Flesh out the memory controller driver (at least for the MCECC chip)
...
and attach it at mainbus since it depends both PCCChip2 and VMEChip2
(or the VMEChip2 interrupter) starting first.
We can finally enable, detect and log DRAM ECC errors.
(The PROM disabled ECC checks by default)
2001-07-27 18:38:54 +00:00
59ba4788ce
Deprecate intrcnt/intrnames in favour of the generic evcnt(9) interface.
2001-05-31 18:46:07 +00:00
c4a189ad74
Print some more details of the memory managed by each ASIC.
2000-11-30 22:51:35 +00:00
dcd1f30fb8
First cut of a driver for the Memory Controller ASICs found
...
on mvme16x and mvme17x boards.
2000-11-24 09:42:09 +00:00
scw