Commit Graph

486 Commits

Author SHA1 Message Date
briggs
7e9ffb8e19 Install spr.h 2005-02-17 02:14:23 +00:00
briggs
d6e37f352e Keep track of the CPU's current speed (in kHz) in the cpu info structure,
if we can get it.  May want to expand this in the future to include min
and max speeds for systems where we can adjust the speed.
2005-02-03 14:47:09 +00:00
simonb
dc5fd1a390 Use lis@h/ori@l instead of lis@ha/addi@l since we may use r0 and addi
is one of those funny instructions that treats r0 == 0 when used as the
first arg.

Fixes problems on ibm4xx.  Ok'd by matt@.
2005-01-23 00:23:57 +00:00
shige
9704ef243d Add consinit() and md_consinit funcptr to ibm4xx/machdep.c.
Rename consinit() to obs405_consinit() at evbppc/obs405/consinit.c.

Set md_consinit to obs405_consinit() at initppc().
Consinit fuction calls a function stored at md_consinit pointer.
2005-01-21 19:24:11 +00:00
matt
9b69be93b4 Add extended BAT block size definitions. 2005-01-21 00:46:23 +00:00
matt
f75acb0839 Add some HID1 definitions and HID0_XBSEN for 7455+ processors. 2005-01-21 00:45:48 +00:00
matt
a59dee22f1 Correct BHTCLR/XAEN definitions. 2005-01-21 00:09:30 +00:00
matt
dcecffc61f Add MPC7448 and change MPC745x_P macro to deal with it. 2005-01-21 00:04:54 +00:00
matt
3f8b260589 Add MPC7447A (0x8003) 2005-01-20 21:26:49 +00:00
matt
2201849e4a Split the hw-dependent powermanglement into its own function and make
Idle call that.  Add a ci_idlespin function pointer to cpu_info.
Update INIT_CPUINFO to initialize it to a naked 'blr' instruction.
In oea/cpu_subr.c, add cpu_idlespin and make ci_idlespin point to it.
2005-01-19 22:22:56 +00:00
chs
40345beaa3 ibm4xx/pte.h is no more. 2005-01-19 14:46:26 +00:00
shige
95b240720a Arrange some machine-dependent code.
- ibm40x_machdep.c: ibm40x specific
	. ibm40x_memsize_init
	. mem_regions
	. other functions are moved to machdep.c or ibm4xx_machdep.c.
  - ibm4xx_machdep.c: ibm4xx specific
	. ibm4xx_init (moved from ibm40x_machdep.c)
	. ibm4xx_install_extint (moved from ibm40x_machdep.c)
	. ibm4xx_cpu_startup (moved from ibm40x_machdep.c:ibm4xx_startup)
	. ibm4xx_dumpsys
2005-01-18 17:11:25 +00:00
shige
ce880a5946 Remove openbios dependent code from ibm4xx/ibm40x dependent module. 2005-01-17 17:19:36 +00:00
shige
0f2e586866 Add openbios-board related modules.
- openbios.c
	getting board data memory image from openbios.
	setting all board data to board properties database.
  - board_prop.c
	initialize board properties database.
	(set/get board properties [macros in ibm4xx/cpu.h])
2005-01-17 16:23:27 +00:00
chs
bfbf7ea9b1 implement pmap_wired_count(). fix some places we would forget to splx().
move the parts of pte.h that were used into pmap.c (since they were really
pmap-internal details) and delete ibm4xx/pte.h.  other misc cleanup.
2005-01-16 21:35:58 +00:00
shige
49c3c14437 Add externs:
- md_device_register (func ptr)
	- ibm4xx_device_register (func)
2005-01-13 17:16:33 +00:00
chs
67402a485f enable powersave mode on 7450 and family.
also, the HID0_DOZE bit in this context doesn't mean "doze",
it's actually "enable extra BATs".  add an alias for this bit
and use it as appropriate.
2005-01-11 02:09:54 +00:00
matt
b046d5ecf9 Now that countless UVM bugs have been fixed, enable "topdown" memory
allocation by default.
2005-01-10 05:42:09 +00:00
shige
eb555844f1 Substitute PPC405_ with PPC_IBM405_. 2004-12-17 16:23:57 +00:00
matt
42e9e00c87 Make MSIZE and MCLSHIFT overrideable in <machine/param.h> 2004-12-09 00:37:54 +00:00
briggs
52af8374ec Minor (old) patch from me to correct CPU ID of 604e vs. 604ev.
Tested by Tim Kelly.
Also patched from Tim to
 - Delay longer for second CPU spinup.
 - Only attempt to print CPU speed and cache configuration on certain
   CPU types.
2004-12-06 04:15:03 +00:00
shige
4b61add729 Add header file for IBM405XX(AMCC405XX) Device Control Registers. 2004-12-01 17:55:33 +00:00
yamt
d2fe4b34bb move some per-cpu data definitions to MI place so that they can be modified
without touching all ports.  discussed on tech-kern@.
2004-09-22 11:32:02 +00:00
scw
ac3ac35ecb MPC8xx DC_CST is SPR 0x238, not 0x230.
Reported by Jared Momose in private email.
2004-09-20 11:29:19 +00:00
simonb
ac20296fee Remove the unused MKTTE macro. 2004-08-31 01:06:12 +00:00
tacha
08adc832cf remove obsolete "pci_enumerate_bus" definition. 2004-08-02 18:07:40 +00:00
manu
f6a07159af typo 2004-07-15 20:21:55 +00:00
manu
67cf1bc043 MacOS X.3 introduces a new sigreturn for PowerPC, with a usercontext
versionning argument. For now we only implement the X.2 flavor.
2004-07-04 21:03:55 +00:00
manu
26200ee754 In MacOS X.3, the kernel maps tw opages of memory in every user process.
This areas is called the comm pages. It is used to provide fast access to
several data and functions.

The comm pages are mapped starting at 0xffff800 (address chosed so that
absolute branch can be used, so it can be accessed even when dynamic linking
is not ready). NetBSD has the user stack here, so we need to provide a
Darwin-specific stack setup routine which sets the top of the stack at
0xbfff0000.

This implementation is not complete but it does enough to get MacOS X.3
starting again (static binaries run, dynamic binaries still have an issue).
in the comm pages functions, we only implement bcopy, pthread_self and
memcpy.

TODO:
- clean up the powerpc specific code from MD parts
- for now we map only one page to avoid a crash, we want two pages.
- write all the comm functions.
2004-07-03 00:14:30 +00:00
kleink
0fea7f39a2 On OEA, turn PSL_USER* into runtime values appropriate for the CPU model
we're executing on; besides dealing with the bits not implemented in the
601's MSR it also removes the silent failure behaviour when passing
PSL_VEC set on a CPU not implementing it.

Also, fix those masks for the 4xx again.
2004-06-26 21:48:30 +00:00
kleink
5b37ad104f Repair a sentence. 2004-06-26 16:04:55 +00:00
kleink
d92e6963e4 Add some BAT-style predicate macros. 2004-06-06 21:23:53 +00:00
kleink
7498ed2ff7 Mark cr0 as clobbered in mfrtc(). 2004-06-06 10:45:06 +00:00
kleink
7b3b647647 Factor out W{CHAR,INT}_{MAX,MIN} into their own header file. 2004-05-08 21:51:47 +00:00
matt
886b18bf35 Add PT_MACHDEP_STRINGS so that kdump(1) can print out the PowerPC-specific
ptrace requests.
2004-05-06 22:53:02 +00:00
matt
8cd24529dc Add a SAVE/DISCARD flag to save_{fpu,vec}_lwp. Use it appropriately.
Nuke struct fpu and use struct fpreg instead (except for the names, they
were identical).  On MP machines, this will avoid an unneeded IPI to save
the register contents that are about to discarded.
2004-04-16 23:58:08 +00:00
hannken
3dc578de5e Make it compile when PPC_HAVE_FPU is not defined. 2004-04-16 08:52:41 +00:00
matt
ee00feaab9 Revamp how user MSR/SRR1 are dealt with.
Add a PSL_USEROK_P(psl) macro which valids the bits (replaces the use of
PSL_USERSTATIC).
Add a PSL_USERSRR1 mask which is used to mask out status bits in the upper
half of SRR1.
Make sure PSL_VEC is set appropriately in userret().  PSL_VEC is in the same
region as SSR1 status bits so it's not preserved on exceptions.  Thus we
need to make to set it.
When returning a MSR/SRR1 to userland, always clear the status bits.
Add emulation of the mfpvr, mtmsr, and mfmsr instructions.
2004-04-15 21:07:06 +00:00
matt
949694f7d9 When seeing if the FP or VEC unit has been stolen by another process, check
PSL_{FP|VEC} instead of PCB_{FP|VEC}.  The former will only be set if the
process owned the {FP,VEC} unit when it trapped into the kernel.  The latter
would be set if the lwp ever used the {FP,VEC} unit.
2004-04-06 02:25:22 +00:00
matt
5bf797c2e1 Add int get_fpu_fault_code(void). 2004-04-04 17:26:58 +00:00
matt
44003b5fca The FP exception mode bits from the MSR will be stored in pcb_flags. From
there, they will copied to MSR as needed (when FP is enabled).  They will be
cleared from the MSR when the lwp loses the FPU.  Hence they need to be stored
someplace else.
2004-04-04 17:01:44 +00:00
matt
c0dce2fdd9 Be a lot more explicit about the MSR bits a user process can change. 2004-04-04 16:49:12 +00:00
matt
0d6bda4d21 When returning back to user mode, if the lwp has lost the FPU, not only
clear PSL_FP bit (to force a FPU Unavailable exception) but clear
PSL_FE0 and PSL_FE1 so that the FP execption mode is changes to ignore.
This will prevent spurious FP exceptions being made when the running lwp
doesn't own the FPU.
2004-04-04 16:47:02 +00:00
drochner
c83eb997b8 nothing cares about __HAVE_SIGINFO anymore, so nuke it 2004-03-26 21:39:57 +00:00
matt
040b0bc071 Move data structures to softintr.c. Remove an unneeded if. Fix a typo. 2004-03-25 18:46:27 +00:00
matt
7f65c1cc37 Generic soft interrupt support for PowerPC ports. 2004-03-24 23:39:39 +00:00
matt
77effcd27e Don't waste space on likely unused sysmon structure.
Instead malloc them as needed.
2004-02-17 22:03:52 +00:00
wiz
d20841bb64 Uppercase CPU, plural is CPUs. 2004-02-13 11:36:08 +00:00
jdolecek
089abdad44 Rearrange process exit path to avoid need to free resources from different
process context ('reaper').

From within the exiting process context:
* deactivate pmap and free vmspace while we can still block
* introduce MD cpu_lwp_free() - this cleans all MD-specific context (such
  as FPU state), and is the last potentially blocking operation;
  all of cpu_wait(), and most of cpu_exit(), is now folded into cpu_lwp_free()
* process is now immediatelly marked as zombie and made available for pickup
  by parent; the remaining last lwp continues the exit as fully detached
* MI (rather than MD) code bumps uvmexp.swtch, cpu_exit() is now same
  for both 'process' and 'lwp' exit

uvm_lwp_exit() is modified to never block; the u-area memory is now
always just linked to the list of available u-areas. Introduce (blocking)
uvm_uarea_drain(), which is called to release the excessive u-area memory;
this is called by parent within wait4(), or by pagedaemon on memory shortage.
uvm_uarea_free() is now private function within uvm_glue.c.

MD process/lwp exit code now always calls lwp_exit2() immediatelly after
switching away from the exiting lwp.

g/c now unneeded routines and variables, including the reaper kernel thread
2004-01-04 11:33:29 +00:00
manu
057381d1b4 Move machine dependent definitions to machine dependent headers. 2003-12-03 18:25:44 +00:00