Split the hw-dependent powermanglement into its own function and make
Idle call that. Add a ci_idlespin function pointer to cpu_info. Update INIT_CPUINFO to initialize it to a naked 'blr' instruction. In oea/cpu_subr.c, add cpu_idlespin and make ci_idlespin point to it.
This commit is contained in:
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d9f85c2154
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2201849e4a
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@ -1,4 +1,4 @@
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# $NetBSD: genassym.cf,v 1.9 2003/11/26 03:51:39 simonb Exp $
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# $NetBSD: genassym.cf,v 1.10 2005/01/19 22:22:56 matt Exp $
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#
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# Copyright (C) 1995, 1996 Wolfgang Solfrank.
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@ -171,6 +171,7 @@ define CI_TEMPSAVE offsetof(struct cpu_info, ci_tempsave)
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define CI_DDBSAVE offsetof(struct cpu_info, ci_ddbsave)
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define CI_IPKDBSAVE offsetof(struct cpu_info, ci_ipkdbsave)
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define CI_DISISAVE offsetof(struct cpu_info, ci_disisave)
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define CI_IDLESPIN offsetof(struct cpu_info, ci_idlespin)
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define CPUSAVE_R28 CPUSAVE_R28*sizeof(register_t)
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define CPUSAVE_R29 CPUSAVE_R29*sizeof(register_t)
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@ -1,4 +1,4 @@
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/* $NetBSD: asm.h,v 1.15 2003/08/08 07:14:26 matt Exp $ */
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/* $NetBSD: asm.h,v 1.16 2005/01/19 22:22:56 matt Exp $ */
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/*
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* Copyright (C) 1995, 1996 Wolfgang Solfrank.
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@ -117,6 +117,9 @@
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stptr er,CI_INTSTK(tmp1); \
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stptr er,CI_IDLE_PCB(tmp1); \
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addi er,er,USPACE; /* space for idle_u */ \
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lis tmp2,_C_LABEL(emptyidlespin)@ha; \
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addi tmp2,tmp2,_C_LABEL(emptyidlespin)@l; \
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stptr tmp2,CI_IDLESPIN(tmp1); \
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li tmp2,-1; \
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stint tmp2,CI_INTRDEPTH(tmp1); \
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li tmp2,0; \
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@ -1,4 +1,4 @@
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/* $NetBSD: cpu.h,v 1.42 2004/09/22 11:32:03 yamt Exp $ */
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/* $NetBSD: cpu.h,v 1.43 2005/01/19 22:22:56 matt Exp $ */
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/*
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* Copyright (C) 1999 Wolfgang Solfrank.
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@ -93,6 +93,7 @@ struct cpu_info {
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register_t ci_disisave[DISISAVE_LEN];
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struct cache_info ci_ci;
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void *ci_sysmon_cookie;
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void (*ci_idlespin)(void);
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struct evcnt ci_ev_clock; /* clock intrs */
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struct evcnt ci_ev_softclock; /* softclock intrs */
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struct evcnt ci_ev_softnet; /* softnet intrs */
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@ -1,4 +1,4 @@
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/* $NetBSD: cpu_subr.c,v 1.19 2005/01/11 02:09:54 chs Exp $ */
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/* $NetBSD: cpu_subr.c,v 1.20 2005/01/19 22:22:56 matt Exp $ */
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/*-
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* Copyright (c) 2001 Matt Thomas.
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@ -34,7 +34,7 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: cpu_subr.c,v 1.19 2005/01/11 02:09:54 chs Exp $");
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__KERNEL_RCSID(0, "$NetBSD: cpu_subr.c,v 1.20 2005/01/19 22:22:56 matt Exp $");
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#include "opt_ppcparam.h"
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#include "opt_multiprocessor.h"
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@ -59,6 +59,7 @@ static void cpu_enable_l3cr(register_t);
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static void cpu_config_l2cr(int);
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static void cpu_config_l3cr(int);
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static void cpu_print_speed(void);
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static void cpu_idlespin(void);
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#if NSYSMON_ENVSYS > 0
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static void cpu_tau_setup(struct cpu_info *);
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static int cpu_tau_gtredata __P((struct sysmon_envsys *,
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@ -214,6 +215,24 @@ cpu_fmttab_print(const struct fmttab *fmt, register_t data)
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}
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}
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void
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cpu_idlespin(void)
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{
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register_t msr;
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if (powersave <= 0)
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return;
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__asm __volatile(
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"sync;"
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"mfmsr %0;"
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"oris %0,%0,%1@h;" /* enter power saving mode */
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"mtmsr %0;"
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"isync;"
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: "=r"(msr)
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: "J"(PSL_POW));
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}
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void
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cpu_probe_cache(void)
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{
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ci->ci_cpuid = id;
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ci->ci_intrdepth = -1;
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ci->ci_dev = self;
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ci->ci_idlespin = cpu_idlespin;
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pvr = mfpvr();
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vers = (pvr >> 16) & 0xffff;
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@ -1,4 +1,4 @@
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# $NetBSD: genassym.cf,v 1.7 2003/11/21 18:07:29 matt Exp $
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# $NetBSD: genassym.cf,v 1.8 2005/01/19 22:22:56 matt Exp $
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#
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# Copyright (C) 1995, 1996 Wolfgang Solfrank.
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@ -181,6 +181,7 @@ define CI_TEMPSAVE offsetof(struct cpu_info, ci_tempsave)
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define CI_DDBSAVE offsetof(struct cpu_info, ci_ddbsave)
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define CI_IPKDBSAVE offsetof(struct cpu_info, ci_ipkdbsave)
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define CI_DISISAVE offsetof(struct cpu_info, ci_disisave)
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define CI_IDLESPIN offsetof(struct cpu_info, ci_idlespin)
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define CPUSAVE_R28 CPUSAVE_R28*sizeof(register_t)
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define CPUSAVE_R29 CPUSAVE_R29*sizeof(register_t)
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@ -1,4 +1,4 @@
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/* $NetBSD: locore_subr.S,v 1.26 2004/12/04 05:56:28 matt Exp $ */
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/* $NetBSD: locore_subr.S,v 1.27 2005/01/19 22:22:56 matt Exp $ */
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/*
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* Copyright (c) 2001 Wasabi Systems, Inc.
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* At this point, other routines can be called (such as uvm_pageidlezero).
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*/
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#if defined(PPC_OEA)
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/* Check if we can use power saving mode */
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lis %r8,_C_LABEL(powersave)@ha
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ldint %r9,_C_LABEL(powersave)@l(%r8)
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add. %r9,%r9,%r9
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ble 1f
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sync
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mfmsr %r4
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oris %r4,%r4,PSL_POW@h /* enter power saving mode */
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mtmsr %r4
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isync
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1:
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#endif /* PPC_OEA */
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GET_CPUINFO(%r8)
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ldptr %r9,CI_IDLESPIN(%r8)
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mtctr %r9
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bctrl
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#if defined(PPC_IBM4XX)
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wrteei 0 /* disable interrupts while
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#endif
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ldreg %r0,CFRAME_LR(%r1)
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mtlr %r0
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blr
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ENTRY_NOPROFILE(emptyidlespin)
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blr /* CPUINIT needs a raw blr */
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/*
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* void
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