NetBSD

Commit Graph

Author	SHA1	Message	Date
scw	7e2f2acb8e	Flesh out the memory controller driver (at least for the MCECC chip) and attach it at mainbus since it depends both PCCChip2 and VMEChip2 (or the VMEChip2 interrupter) starting first. We can finally enable, detect and log DRAM ECC errors. (The PROM disabled ECC checks by default)	2001-07-27 18:38:54 +00:00
scw	dcd1f30fb8	First cut of a driver for the Memory Controller ASICs found on mvme16x and mvme17x boards.	2000-11-24 09:42:09 +00:00

Author

SHA1

Message

Date

scw

7e2f2acb8e

Flesh out the memory controller driver (at least for the MCECC chip)

and attach it at mainbus since it depends both PCCChip2 and VMEChip2
(or the VMEChip2 interrupter) starting first.

We can finally enable, detect and log DRAM ECC errors.
(The PROM disabled ECC checks by default)

2001-07-27 18:38:54 +00:00

scw

dcd1f30fb8

First cut of a driver for the Memory Controller ASICs found

on mvme16x and mvme17x boards.

2000-11-24 09:42:09 +00:00

2 Commits