Commit Graph

79 Commits

Author SHA1 Message Date
thorpej 0ddf0d259b Don't use BUS_END to compute SYS_END. 2001-06-14 18:48:23 +00:00
thorpej 80dfaa3e5a Read the PCI memory space base and the PCI DMA window base from the
V3 PBC, and use them in the bus mem tag and the bus dma tag on the
P-4032.  This allows us to get much further when PMON has configured
the PBC using the old-style PCI address map.
2001-06-14 17:57:26 +00:00
thorpej 4c73c770ce Add MEMSIZE and ETHADDR options, so that they can be set in
the kernel config file, in case you have a buggy PMON which
doesn't provide the environment variables to the kernel.
2001-06-14 16:14:37 +00:00
thorpej defcaa8bcb Initlialize PMON after configuring the console, so we can see
debugging info.
2001-06-14 15:29:23 +00:00
thorpej 587d3ec2b4 Insert some debugging code, conditional on PMON_DEBUG. 2001-06-14 15:28:56 +00:00
thorpej 3bad583046 Oops, use the correct space tag when unmapping the RTC on the
P-4032 after calibrating the clock.
2001-06-14 05:58:19 +00:00
thorpej 7e59a1be7a No longer need MIPS3_5200 here. 2001-06-12 22:32:50 +00:00
thorpej be7629b7e0 Hand off intr evcnt responsiblity in a reasonable way on the 5064. 2001-06-10 09:28:26 +00:00
thorpej 7c074dc806 Check in work-in-progress of generic ISA interrupt support. The
goal here is to get the P-5064 PCMCIA slots working, and serve as
the basis for P-6032 interrupt support.

PCMCIA interrupt auto-detection not working -- more work to be
done here.
2001-06-10 09:13:06 +00:00
thorpej 82418a77b0 Add PCMCIA devices. 2001-06-10 08:45:09 +00:00
thorpej 1930cfd7dc Correct for a data structure change. 2001-06-10 06:17:15 +00:00
thorpej ce66bf0803 Rewrite the interrupt handling code:
- Compute the number of CPU pipeline cycles per second using the
  mc146818.
- Use the COMPARE interrupt for the hardclock interrupt.
- Collapse all interrupt priorities into a single priority, and use
  the CPU interrupt inputs to determine the interrupt source (local
  device, PCI device, ISA device, etc.)

This allows us to have interrupt sharing.
2001-06-10 05:26:58 +00:00
thorpej 0e82abb5de Add MIPS3_5200. 2001-06-10 05:02:33 +00:00
simonb e5bd00e48d For ports that wire up pciide in compatibility mode, have
them define __HAVE_PCIIDE_MACHDEP_COMPAT_INTR_ESTABLISH
in pci_machdep.h and pciide_map_compat_intr() only calls
pciide_machdep_compat_intr_establish() if that preprocessor
define exists.

Ports that don't need to do this no longer need to supply a
dummy function.
2001-06-08 04:48:54 +00:00
thorpej 2b5df8b7ff vm_page_t -> struct vm_page * 2001-06-01 19:52:54 +00:00
thorpej 71cb790fb5 Add support for the Algorithmics P-4032 board. This is totally
untested, since I have no P-4032 board, but it's no worse than
the current situation, which is "totally non-working P-4032
support in the ARC port, of all places".
2001-06-01 16:00:03 +00:00
thorpej 23a3dc1508 If a bus doens't want to use an extent, don't force it to. 2001-06-01 15:57:31 +00:00
thorpej 356699e86b Fat-trimming. 2001-06-01 15:30:11 +00:00
thorpej c702830c42 The P-4032 has no ISA bridge/bus, so remove all P-4032 conditionals. 2001-06-01 15:20:06 +00:00
thorpej f4f6c1dd1c Enable SCSI. 2001-06-01 03:53:29 +00:00
nisimura 1f4f9ae5c2 Fix minor typos. 2001-05-31 07:24:23 +00:00
enami 299159546d s/Alpha/MIPS/ in comment. 2001-05-31 02:20:55 +00:00
lukem d84d2c6c85 add missing #include "opt_kgdb.h" 2001-05-30 15:24:23 +00:00
mrg 67afbd6270 use _KERNEL_OPT 2001-05-30 11:57:16 +00:00
thorpej f0c1fb1bb2 Initialize DDB at boot time and break into it if the "d" argument
is specified to the kernel.

XXX PMON doen't load symbols for us -- need a dbsym(1) for ELF.
2001-05-29 18:40:25 +00:00
thorpej f2800b2299 Don't have conf.h (pasto). 2001-05-28 23:25:25 +00:00
thorpej 9d8dc820a8 Forgot bsd.kinc.mk 2001-05-28 22:34:25 +00:00
thorpej af63f8979c D'oh, clear the soft interrupt bits in CAUSE *before* servicing
soft interrupts, rather than after, so that soft interrupts scheduled
by other soft interrupts don't get lost.
2001-05-28 18:19:27 +00:00
thorpej 16b9c60621 A port to the Algorithmics MIPS evaluation boards. We currently
support the P-5064, which has a QED RM5xxx CPU soldered on.

There is some skeletal support for the P-4032 (an older board, which
had an R4xxx CPU).  There are some placeholders for the P-6032, which
is their newest board, but no real code yet (the P-6032 has a different
PCI controller, the Algorithmics BONITO).

There are still some (apprently softintr-related) problems with the
algor kernel, but it works well-enough to self-host.

Kudos to Allegro Networks for loaning me a P-5064 board on which to do
the port.
2001-05-28 16:22:13 +00:00