Commit Graph

13 Commits

Author SHA1 Message Date
thorpej 95fa2e148a Use aprint_normal() for cfprint routines. 2003-01-01 01:57:51 +00:00
thorpej adb90ad2ae Use CFATTACH_DECL(). 2002-10-02 04:17:21 +00:00
thorpej f818766afe Declare all cfattach structures const. 2002-09-27 20:31:45 +00:00
provos 0f09ed48a5 remove trailing \n in panic(). approved perry. 2002-09-27 15:35:29 +00:00
chs b5e02d5677 implement device_register() for ofppc.
use ofcons_cnprobe().
2002-09-18 01:44:12 +00:00
chs 976b0910c4 fix the ofppc interrupt code to work at all. the previous code was
confusing an IPL number with an IRQ mask.  now we do like the x86 code.
2002-09-18 01:43:07 +00:00
matt 685778b53b Peform a rototill over the powerpc-based ports.
Move the trap/vector initialization for MPC6xx ports to mpc6xx_machdep.c
Also move softnet, install_extintr, mapiodev, kvtop.  Add common BAT
initialization code.

Add user Altivec support.

Fix calls to OF_call_method in macppc/macppc/machdep.c.

Use ci_fpuproc in cpu_info instead of separate fpuproc.

Add separate syscall.c and defined __HAVE_SYSCALL_INTERN.
2002-07-05 18:45:15 +00:00
thorpej 204183c0fa * Add "pcitag_t *pba_bridgetag" to pci_attach_args. This is set to
NULL for root PCI busses.  For busses behind a bridge, it points to
  a persistent copy of the bridge's pcitag_t.  This can be very useful
  for machine-dependent PCI bus enumeration code.
* Implement a machine-dependent pci_enumerate_bus() for sparc64 which
  uses OFW device nodes to enumerate the bus.  When a PCI bus that is
  behind a bridge is attached, pci_attach_hook() allocates a new PCI
  chipset tag for the new bus and sets it's "curnode" to the OFW node
  of the bridge.  This is used as a starting point when enumerating
  that bus.  Root busses get the OFW node of the host bridge (psycho).
* Garbage-collect "ofpci" and "ofppb" from the sparc64 port.
2002-05-16 01:01:28 +00:00
thorpej 0896046ab3 Attempt at making Type 1 config cycles work, based on "see config-map". 2001-10-30 01:21:24 +00:00
thorpej ccb78392f1 Check in of work-in-progress of Firepower native device support.
We can find devices in PCI configuration space, but not much else.
2001-10-29 22:28:37 +00:00
thorpej 61438ef172 For System registers which are not 32-bits wide, they are "left justified"
within the 32-bit word.  Add CSR_{READ,WRITE} macros which compensate for
this.
2001-10-29 18:57:15 +00:00
thorpej b5ae57acc0 Fix a typo, add some UL suffixes to memory map constants. 2001-10-29 04:48:21 +00:00
thorpej 678788904a Memory map and system registers for the Firepower ES, MX, LX, and TX
systems.
2001-10-24 20:36:44 +00:00