processors. Instead, allocate separate idle PCBs for them (including
the primary -- don't use proc0's for its idle context).
- Use SysValue to store the cpu_info for each processor.
overlap; don't require allocation from the dense extent if the PCI
memory address isn't mapped into dense space.
Also, make sure to return an error if a liner mapping is requested
and dense space is not available (not just not requested).
configuring w/o SIO broke compilation. I forget why, but there was at one
point (and may still be) a dependency between SIO and EISA. This change
just makes things compile sensibly again. It may make no sense to build
a kernel w/o sio in this case. I can't test this conveniently because I
haven't got a 4100 with a video card in it at the moment.
- Use explicit assembly; don't want the compiler optimizing things too
much here.
- Subtract 2 for each iteration of the loop, rather than 3. The loop
consists of only 2 instructions (even the C version compiled to a
loop of 2 instructions).
The latter change has squashed a fairly annoying timing bug in the
mii_bitbang module as used by the `ex' driver on my AlphaStation 500.
XXX delay() should maybe be rewritten again, to use the rpcc instruction.
- alpha_rpcc(), alpha_mb(), alpha_wmb() -- these are instructions, and
we win by inlining them: rpcc is generally used for profiling, and
the memory barriers really should execute as quickly as possible with
minimal side-effects (like additional loads/stores required to call the
functions!)
- alpha_pal_imb(), alpha_pal_rdps(), alpha_pal_swpipl(), alpha_pal_tbi(),
alpha_pal_whami() -- these are PALcode ops. We must specify some register
clobbers for these.
We have a very decent size savings as a result. My test system:
text data bss dec hex filename
2671724 235848 377016 3284588 321e6c /netbsd.bak
2617708 235736 377016 3230460 314afc /netbsd
Most of this comes from fewer register saves/restores around spl*() calls
(now that alpha_pal_rdps() and alpha_pal_swpipl() are inlined).
Note that alpha_pal_rdps() and alpha_pal_swpipl() remain in pal.s to
maintain binary compatibility with LKMs that may use spl*() functions.
add an IPI which causes the target CPU to perform AST processing when
it returns to userspace.
- Add a way to get/set a private pointer in the shared interrupt header.
longer need to lock the kernel pmap in pmap_kenter_pa() and pmap_kremove().
- Since locking the kernel pmap in interrupt context is no longer required,
don't go to splimp() when locking the kernel pmap.
- Implement a new pmap_remove() function, not yet enabled by default. It
is structured like pmap_protect, and should be *much* faster. This was
actually written quite some time ago, but never committed because it
didn't work properly. Given the recent bugfix to pmap_protect(), "duh,
of course it didn't work properly before...". It seems to work fine now
(have done several builds and run the UVM regression tests using the new
code), but it is currently run-time optional so that some performance
measurements can be easily run against the old and new code.
* We could overrun the eva by as much as L1SEG_SIZE-PAGE_SIZE.
* sva was advanced *twice* for each valid l3 or l2 page, causing it to get out
of sync with the PTE pointers.
remove GENERIC.v6 file (as it is part of GENERIC now).
"faith" interface is commented out by default as it is not really for
general use.
IPsec items are commented out as well, though we can enable "options IPSEC"
without export-related issue ("options IPSEC" will enable authentication
portion only). We may need to think about it again.
if you have problem compiling with INET6 on archs I do not have access to,
please contact me.
XXX what to do with arch/arm32/SHARK{,.v6}?
>split the "asc" and "tcds" searching into two separate sections and
>keep a "tcdsdev" of the booted tcds device. make sure that the "asc"
>is the child of the tcds. this fixes boot device detection on dec
>5000/400 (prolly 400-900) machines in the presense of a tcds option
>card, which would use the right tcds chip & disk scsiid of the last
>attached tcds -- which meant it would choose the wrong disk, or not
>find the boot device at all if the corresponding scsiid was unused in
>the last attached disk.
>
>XXX: this may need to be copied to dec_3000_300.c but i have no idea
>as i can not test this hardware at all...
>
>fixes PR#8771 by myself.
keep a "tcdsdev" of the booted tcds device. make sure that the "asc"
is the child of the tcds. this fixes boot device detection on dec
5000/400 (prolly 400-900) machines in the presense of a tcds option
card, which would use the right tcds chip & disk scsiid of the last
attached tcds -- which meant it would choose the wrong disk, or not
find the boot device at all if the corresponding scsiid was unused in
the last attached disk.
XXX: this may need to be copied to dec_3000_300.c but i have no idea
as i can not test this hardware at all...
fixes PR#8771 by myself.
- Fix a bug where IPL wasn't being lowered to process SIRs, which
effectively caused them to be processed at splserial(), and loop
over the ssir, like we do for astpending.
- Optimize the flow of exception_return().
the page attributes in pmap_enter().
- It's no longer necessary (and hasn't been for a while in this pmap) to
go to splimp() to use the physical->virtual table, so remove all such
uses.
the freebsd-alpha mailing list which basically boiled down to increasing
stack depth due to lowering the IPL before checking for an AST.
This changes AST processing to do basically what the i386 port does (as
described by Charles Hannum):
check_ast:
if (astpending) {
lower IPL
process AST
raise IPL
goto check_ast
}
.
Makes the 64-bit alpha checksum magically contain an embedded 16-bit
Sun (NetBSD/sparc) compatible magic number and checksum. This is the
last piece in the "boot one disk from alpha, sun, and i386" problem.
.
And for those who told me this had been done before, :-P. It turns out,
it was only done in the collective sense by multi-disk distributions.
big-endian. i386, pc532 and vax still include <machine/byte_swap.h>
and define macros for the {n,h}to{h,n}*() functions. mips also
defines some endian-independent assembly-code aliases for unaligned
memory accesses.
that is priority is rasied. Add a new spllowersoftclock() to provide the
atomic drop-to-softclock semantics that the old splsoftclock() provided,
and update calls accordingly.
This fixes a problem with using the "rnd" pseudo-device from within
interrupt context to extract random data (e.g. from within the softnet
interrupt) where doing so would incorrectly unblock interrupts (causing
all sorts of lossage).
XXX 4 platforms do not have priority-raising capability: newsmips, sparc,
XXX sparc64, and VAX. This platforms still have this bug until their
XXX spl*() functions are fixed.
* New features:
+ traceback for threads (i.e., pids): db>trace/t 0t<pid>
+ traceback over console restart (halt and SRM continue)
+ print ipl in trapframes when it's known and it changed
+ print emulation and system call entry name (!) if proc is known
--- syscall (240, netbsd.sys_nanosleep) ---
- fix emitrules() like emitfiles() to deal with the prefix (otherwise it
would attempt to find the file in the normal base for the NORMAL_C rule).
- add emitincludes() which adds include directives for each prefix to the
$INCLUDES variable in the makefile.
- add %INCLUDES to each Makefile.arch to deal with the above.
this makes "prefix" actually work in a usable manner, and now i can move
on to fixing compiler warnings (errors) in the ESP code. :)
- remove "need-flag" for mac68k esp driver, as it is not used in anywhere
and conflicts with IPsec ESP header.
This should be the only MD change in IPv6 support, except kernel config file.
Very sorry if you have any compilation problem with it (I believe it is okay).
If your favorite arch is not included in here, please add a
call to ip6intr() from softintr handle.
has PAGEABLE and INTRSAFE flags. PAGEABLE now really means "pageable",
not "allocate vm_map_entry's from non-static pool", so update all map
creations to reflect that. INTRSAFE maps are maps that are used in
interrupt context (e.g. kmem_map, mb_map), and thus use the static
map entry pool (XXX as does kernel_map, for now). This will eventually
change now these maps are locked, as well.
managed pages, into KVA space. Since the pages are managed, we should
use pmap_enter(), not pmap_kenter_pa().
Also, when entering the mappings, enter with an access_type of
VM_PROT_READ | VM_PROT_WRITE. We do this for a couple of reasons:
(1) On systems that have H/W mod/ref attributes, the hardware
may not be able to track mod/ref done by a bus master.
(2) On systems that have to do mod/ref emulation, this prevents
a mod/ref page fault from potentially happening while in an
interrupt context, which can be problematic.
This latter change is fairly important if we ever want to be able to
transfer DMA-safe memory pages to anonymous memory objects; we will need
to know that the pages are modified, or else data could be lost!
Note that while the pages are unowned (i.e. "just DMA-safe memory pages"),
they won't consume any swap resources, as the mappings are wired, and
the pages aren't on the active or inactive queues.
context, so we must block interrupts which may cause memory allocation
before asserting the kernel pmap's lock. Put this all in PMAP_LOCK()
and PMAP_UNLOCK() macros to make it easier.
directly, call the function pointer (*if_input)(ifp, m). The input routine
expects the packet header to be at the head of the packet, and will adjust
as necessary. Privatize the layer 2 input and output routines, allowing
*_ifattach() to set them up as appropriate.
the child inherits the stack pointer from the parent (traditional
behavior). Like the signal stack, the stack area is secified as
a low address and a size; machine-dependent code accounts for stack
direction.
This is required for clone(2).
unaligned access handler and clean it up some. Add support for emulating
the BWX instructions (ld{b,w}u, st{b,w}, sext{b,w}), which user software
can expect to be emulated. (Thanks, Alpha Architecture!)
register names was confusing, and could not _be_ correct in some cases.
Also, add a couple of 'generic' instruction formats which should be used
when decoding instructions before the specific format is known.
* Implement fpgetsticky() for alpha.
* Direct fpsetsticky() and fp{get,set}mask() into alpha kernel via sysarch(2).
* Define new sysarch(2) stub for above and install and distribute sysarch.h
for alpha. (The fpcr IS user mode r/w, but for reasons beyond the scope
of a commit message kernel calls are needed.) And much kernel Magick is
required before these do anything, but this way programs compiled under
1.4 will DTRT on future snapshots and releases.
in DDB (e.g. if a bad pointer was dereferenced; the debugger will recover).
- Change a comment to indicate that we are on the debugger stack when we get
to ddb_trap().
- Fix possible buglet in computation of the branch target in db_branch_taken().
happen. If the debugger doesn't handle the trap, arrange things so the
debugger won't be called again before we panic.
- Before panic'ing, give the debugger a chance to field the trap, and
if the debugger has handled things, allow the kernel to continue running,
like the i386 port does.
debugger differently.
- Pull in debugger glue if DDB is configured.
And one unrelated change, while I was here: Don't create a fake trapframe
for main(); it hasn't been used by main() for quite some time, and panic
if main() returns, because that's not supposed to happen now.
thorpej