This allows cats to override the BIOS (aka ABLE) settings, which enable
native mode, but doesn't route the interrupts correctly.
Discussed last year on tech-kern and port-cats.
bit 2 or 3. Thanks to Takeshi Nakayama for catching it.
(With this mistake the code was still working for the first channel, because
the reset of the second channel would disable/enable the first one).
is set to NULL, use the generic reset code.
Use this to work around a bug in some Acer IDE controllers (like the
one found in some sparc systems) where a controller disable/enable
is required after a reset to avoid data corruption when Ultra-DMA is
used. Workaround from opensolaris, thanks to Hiroki Sato for testing.
ata_channel.
- Add and use a CHAN_TO_WDC_REGS() macro to get the wdc_regs from an
ata_channel.
- Add and use a CHAN_TO_PCIIDE() macro to get the pciide_softc from an
ata_channel.
- Add and use a CHAN_TO_PCHAN() macro to get the pciide_channel from an
ata_channel. (This one just hides a cast, and is really just for
consistency with the others.)
wdc_regs structure, and array of which (indexed per channel) is pointed
to by struct wdc_softc.
- Move the resulting wdc_channel structure to atavar.h and rename it to
ata_channel. Rename the corresponding flags.
- Add a "ch_ndrive" member to struct ata_channel, which indicates the
maximum number of drives that can be present on the channel. For now,
this is always 2. Add an ATA_MAXDRIVES constant that places an upper
limit on this value, also currently 2.
according to the controller-dependant registers while wdc was not waiting for
an interrupt). A reset can generate spurious interrupts (or even a flow of
spurious interrupts on the promise) that needs to be properly acknowledged.
in a different fashion. Individually, they have the same functionality,
but their layout is different. An example of such a chipset is
the Promise 203xx.
To be able to deal with this, transform the cmd and dma bus_space handles
into an array of handles, each seperately created with bus_space_subregion.
The code generated by using the extra indirection shouldn't change much,
since the extra indirection is negated by having the offset calculation
already done in bus_space_subregion. E.g.
bus_space_write_4(tag, handle, offset, value)
becomes
bus_space_write_4(tag, handles[offset], 0, value)
Reviewed by Manuel Bouyer. Tested on wdc_isa, wdc_pcmcia, viaide, piixide (i386)
and on cmdide (sparc64).
http://mail-index.netbsd.org/tech-kern/2003/09/25/0007.html
We now have:
acardide* at pci? dev ? function ? # Acard IDE controllers
aceride* at pci? dev ? function ? # Acer Lab IDE controllers
cmdide* at pci? dev ? function ? # CMD tech IDE controllers
cypide* at pci? dev ? function ? # Cypress IDE controllers
hptide* at pci? dev ? function ? # Triones/HighPoint IDE controllers
optiide* at pci? dev ? function ? # Opti IDE controllers
piixide* at pci? dev ? function ? # Intel IDE controllers
pdcide* at pci? dev ? function ? # Promise IDE controllers
siside* at pci? dev ? function ? # SiS IDE controllers
slide* at pci? dev ? function ? # Symphony Labs IDE controllers
viaide* at pci? dev ? function ? # VIA/AMD/Nvidia IDE controllers
pciide* at pci? dev ? function ? flags 0x0000 # GENERIC pciide driver
serverworks driver not commited yet; there are still copyright issues about
it.
nakayama