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6b313f2c5f
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26751 Commits

Author SHA1 Message Date
thorpej
6b313f2c5f Basic EISA support for the Indigo2. From Rafal K. Boni. 2001-05-11 04:36:15 +00:00
thorpej
13f69bc540 Generic software interrupt implementation, derived from mipsco 
implementation.

From Rafal K. Boni.
 2001-05-11 04:32:05 +00:00
thorpej
87f3aebd5e New data structures for the new SCC driver. 
From Rafal K. Boni.
 2001-05-11 04:26:17 +00:00
thorpej
f24f6c113d Support for the SCC serial ports on Indigo2/Indy. 
From Rafal K. Boni.
 2001-05-11 04:24:44 +00:00
thorpej
3b92374a20 Support for the Indigo2/Indy IMC (this is that to which all other 
devices are attached).
 2001-05-11 04:22:55 +00:00
thorpej
e6e4372ada New clock functions, based on the newsmips versions. These 
actually do something, by calling into the hardware clock
routines set up during autoconfiguration.

From Rafal K. Boni.
 2001-05-11 03:42:59 +00:00
thorpej
ce9753d9e9 Autoconfiguration glue for HPC devices. 
From Rafal K. Boni.
 2001-05-11 03:23:38 +00:00
thorpej
5885656e58 Support for the Seeq 8003 Ethernet attached to the HPC ASIC, 
found on Indigo2 and Indy.

From Rafal K. Boni.
 2001-05-11 03:22:21 +00:00
thorpej
5d02689ede IOC1/2 memory map. 
From Rafal K. Boni.
 2001-05-11 03:18:57 +00:00
thorpej
726924bc4c Support for the Dallas 1286 clock found on the Indigo2 and Indy. 2001-05-11 03:16:59 +00:00
thorpej
c4173c40c1 Support for the HPC I/O peripheral ASIC. There is where SCSI, Ethernet, 
etc. live on the Indigo2 and Indy.

From Rafal K. Boni.
 2001-05-11 03:11:20 +00:00
thorpej
149ebabf26 Get the major number of the CRIME properly. 
From Rafal K. Boni.
 2001-05-11 02:25:21 +00:00
thorpej
4efd12ca44 Set SR to PSL_LOWIPL rather than MIPS_INT_MASK | MIPS_SR_INT_IE, 
as the former accounts for some mips3-related options.

From Rafal K. Boni.
 2001-05-11 02:03:01 +00:00
thorpej
0976e733f4 Correct args to SYSCALL_DEBUG related function calls. 
From Rafal K. Boni.
 2001-05-11 01:42:32 +00:00
petrov
591e596a12 john heasley patch <heas@shrubbery.net>, PR port-sparc/12885 
added PROM name translations for hme and fas
 2001-05-10 23:11:53 +00:00
tron
74cc245bbe Fix typo: Pnp -> PnP 2001-05-10 22:12:38 +00:00
fredette
ee50c275ca Put longjmp's return value in the proper %d0. 2001-05-10 16:50:22 +00:00
pk
8001e23cd0 * reserve NBPG et.al. for kernel usage only. 
* remove obsoleted comment on `physmap'.
 2001-05-10 11:01:08 +00:00
lukem
88d538c21e fix comment; cdev_notdef() is a funny pc console :) 2001-05-10 01:23:23 +00:00
thorpej
e2a791df22 Use pool_init() rather than pool_create(). 2001-05-09 23:20:59 +00:00
matt
c2214aaf3c Remove includes that only include <arm/*.h>. These are now picked up 
automatically when making kernels. (to be submitted).  Next rev will
eliminate those includes that include <arm/arm32/*.h>
 2001-05-09 22:30:43 +00:00
kleink
dd4df24b01 Make the set of machine state restored by setmcontext() identical to that of 
sigreturn().
 2001-05-09 20:31:00 +00:00
kleink
e0b29e0491 Sync with native emul: rename sc_tstate to sc_psr. 2001-05-09 20:21:50 +00:00
kleink
f0d6ebbd33 Make restoring the PSR ICC bits really work in __sigreturn14(). 2001-05-09 20:13:38 +00:00
kleink
aec2bbb42f Sync sc_psr comments with reality. 2001-05-09 19:50:49 +00:00
kleink
7dbfdb5508 In the 32-bit ABI case: 
* rename sigcontext.sc_tstate to sc_psr, since this is how it is known to
  the 32-bit API, and also used for;
* don't try to squeeze the tstate into it, just emulate the ICC bits.

Per discussion with Eduardo.
 2001-05-09 19:46:22 +00:00
matt
9c197c4609 Change references to <arm32/isa/timerreg.h> to <dev/ic/i8253reg.h> 
Remove timerreg.h
 2001-05-09 17:34:40 +00:00
tsutsui
73c5107dc5 Tidy up some debug messages. 2001-05-09 16:44:44 +00:00
matt
bd9a11ee56 Populate ofw subtree. 2001-05-09 16:08:43 +00:00
matt
16db09f9f6 Add isa_machdep.c for dnard 2001-05-09 15:58:50 +00:00
matt
77666e6c72 Populate dnard/dnard. 2001-05-09 15:58:07 +00:00
matt
0cd5b27a79 Populate dnard/include 2001-05-09 15:40:54 +00:00
matt
a0b5b1f2ba Cleanup and make accurate to current dnard status. 2001-05-09 15:20:49 +00:00
matt
a9dceff4e1 add cpu ofbus attachment. (dnard has no mainbus). 2001-05-09 15:19:00 +00:00
matt
86fff9f3e8 Use the common arm32/pcb.h. Rearrange db_machdep.h to get definitions 
before declaring functions.
 2001-05-09 15:17:45 +00:00
matt
879ab84d00 Modify this for dnard (remove monitor stuff). 2001-05-09 15:16:24 +00:00
shin
6fbde674dd don't define TAILQ_EMPTY here. TAILQ_EMPTY is defined in <sys/queue.h>. 2001-05-09 11:57:05 +00:00
fredette
66c27dfc2e Removed, cleaning up (no-)FPU support. 2001-05-08 21:39:24 +00:00
kleink
cddc4b4264 While we're here, do SVR4_SPARC_ASI as well. 2001-05-08 20:57:17 +00:00
kleink
3d3703c7bd On v9, greg[0] isn't a TSTATE-in-PSR hack but just CCR. 2001-05-08 20:46:49 +00:00
kleink
bd0787e771 One step closer to making ICC/CCR manipulation work. 2001-05-08 19:30:05 +00:00
uch
fae3e8e7c1 KNF. 2001-05-08 18:51:22 +00:00
uch
5dd9fe4aa5 set allocatable PCMCIA I/O space size. 2001-05-08 18:08:02 +00:00
matthias
0edc338e99 third argument of pcpoll is a struct proc now. 2001-05-08 11:29:39 +00:00
matt
c8f1f39d19 Disable the secondary ide port in the pcibus_attach_hook. 2001-05-08 06:55:17 +00:00
is
09a3dd5f0c defopt LEV6_DEFER. 2001-05-08 06:09:29 +00:00
nisimura
7ec840fbe5 Add comment to tell what cpu_fork() does around at its bottom. 
What's wrong; the initial SR value in pcb0 gets overwritten before
the first kthread_create1() is called.  For a normal process which
has user mode it doesn't matter because proc_trampoline() makes
the process to have spl0 during exception return path to user mode,
however, kthreads stay in kernel mode mistakenly left in splhigh
condition.  The trouble is visible as severe clock drifts when
system activity is high.
 2001-05-08 06:02:14 +00:00
ross
d6a25f9b02 Add DEBUGLIST mechanism. Example config line: 
makeoptions DEBUGLIST="uvm* trap ufs*"
This turns on -g for only those files matching a DEBUGLIST pattern word.
 2001-05-08 05:47:35 +00:00
nisimura
580e36f497 Make sure to have spl0 condition whenever a new thread of control 
is created.  System kthreads are mistakenly left splhigh state.

pcb0 has an initial SR value for spl0 condition which are expected to
be propagated to all of children
 2001-05-08 05:36:01 +00:00
fredette
bdf32dea4f Turned all lea/jsr combinations back into jbsrs, 
as they were originally.
 2001-05-07 21:48:24 +00:00