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Author SHA1 Message Date
matt
690eda7bb4 Avoid defining MLIBDIR. Use ${MLIBDIR:Unone} instead. 2015-06-08 04:08:30 +00:00
msaitoh
c40932aab7 Call wm_pll_workaround_i210() at the end of the wm_reset() function, too. 2015-06-08 03:45:19 +00:00
rmind
1662d4f47c - npfctl: fix the confusion in the parser (0/0 case with no other filter). 
- Always populate the error dictionary, not only for DEBUG/DIAGNOSTIC.
 2015-06-08 01:00:43 +00:00
matt
e069fa61fc Add bluetooth 2015-06-07 21:05:33 +00:00
mlelstv
e48922a086 Fix space calculation for dump header. Round up to clicks to avoid 
disk alignment issues.
 2015-06-07 20:00:11 +00:00
matt
e4cf7e4e27 Back out last change; fixed in the correct place. 2015-06-07 15:06:24 +00:00
matt
91746eb77c Use ${COPT} so it properly emits the right features doing MKCOMPAT 2015-06-07 15:05:34 +00:00
matt
6811dc67f2 Make LIBCRT* depend on the right files if MLIBDIR from MKCOMPAT is defined. 2015-06-07 15:04:28 +00:00
hannken
fc48ac80f9 Fix copy and paste errors from last commits. 
- Kernel i386/ALL and amd64/ALL compile again.
- Resolves CID 1304138 (DEADCODE) and 1304139 (IDENTICAL_BRANCHES).
 2015-06-07 13:39:48 +00:00
skrll
948af22daf Dont use magic number. 
No functional change.
 2015-06-07 12:01:41 +00:00
joerg
33e2d9fc4a Require ARMv5TE to assemble. 2015-06-07 11:46:56 +00:00
joerg
2b71fd9719 Add ARM EABI aliases for aligned arguments. 2015-06-07 11:41:59 +00:00
matt
8f95c8a398 Define COP0 register that use select value in <mips/cpuregs.h> 
Use those new definitions
 2015-06-07 08:03:10 +00:00
matt
6624f40a20 #include <mips/cpuregs.h> 2015-06-07 07:19:21 +00:00
matt
a7346dbcbf Multiple inclusion protection 2015-06-07 07:14:47 +00:00
matt
df674b3309 This uses CPU_INFO_FOREACH so it really should include <sys/cpu.h> 2015-06-07 06:08:37 +00:00
matt
682a7cddf7 assembly no longer include <machine/cpu.h>. Instead MIPS_CURLWP is gotten 
from regdef.h and everything else from assym.h.  <mips/mips_param.h> no
longer include <machine/cpu.h>
 2015-06-07 06:07:49 +00:00
pgoyette
a2c252cf10 Update to reflect changes made in rev 1.398 of src/etc/Makefile 2015-06-07 05:32:38 +00:00
pgoyette
c09d6082f2 Update location of live-images to reflect changes made in rev 1.398 of 
src/etc/Makefile
 2015-06-07 05:30:18 +00:00
matt
b45b235ea3 Add an assert to verify interrupts are enabled. 2015-06-06 22:23:31 +00:00
matt
0112a16de0 Add a few KDASSERT for interrupts being enabled. 2015-06-06 22:22:03 +00:00
matt
f7fec9a073 Make db_expr_t long long when using the N32 ABI. 2015-06-06 22:19:07 +00:00
matt
12f31456a1 Add support for 'q' qualifier for 64-bit values on examine and write. 
Align data to long so that the MD parts can use aligned load/stores.
Don't use db_extend but use db_expr_t based expressions.
 2015-06-06 22:06:05 +00:00
matt
e1471d6403 Add mipsX_nonmaskable_intr if DDB is defined. 
Add missing */ at end of comment.
Use trap instructon on mipsNN in paranoia sections instead of endless loop.
 2015-06-06 21:48:45 +00:00
matt
9c81e9b67f Convert a KASSERT to KASSERTMSG 2015-06-06 21:46:17 +00:00
matt
542cc5617c On mipsNN use trap instructions when inconsistent status register settings 
are found.
 2015-06-06 21:45:40 +00:00
matt
3018f20610 Use ci_nmi_stack 2015-06-06 21:44:16 +00:00
matt
991d081316 Reuse the ci_next to hold the nmi exception stack. 2015-06-06 21:38:47 +00:00
matt
719767422e Add octeon_reset_vector which handles soft resets and nmi that comes through 
the boot vector @ 0xbfc00000.
 2015-06-06 21:05:16 +00:00
matt
02f5ae8942 Add more KASSERTs 
After each CPU is marked running, wait a small of time or until it shows
up in kcpuset_running.
 2015-06-06 21:03:45 +00:00
matt
d58fd45326 On mipsNN use the trap instruction to panic or pop into ddb instead of 
looping forever in the PARANOIA chunks.
 2015-06-06 20:55:45 +00:00
matt
841b78119f Add support for NMI exception (which don't use the cause register). 2015-06-06 20:53:38 +00:00
matt
847a18937e Add wdog support 
cleanup IPI and MP support
Add NMI support.
 2015-06-06 20:52:16 +00:00
matt
29ebd0ba65 Add CIU_BASE 2015-06-06 20:15:35 +00:00
macallan
4efe1f19ef use PRIxCPUSET 
now this builds again on o32
 2015-06-06 17:46:47 +00:00
macallan
700e4e855d introduce PRIxCPUSET to deal with 32bit __cpuset_t on o32 2015-06-06 17:45:49 +00:00
msaitoh
225ac59368 Fix the output of the option ROM version. 2015-06-06 17:36:50 +00:00
joerg
8cd9de5e58 Linking against libutil is not appropiate for tools. 2015-06-06 15:45:47 +00:00
joerg
3eb04a3615 Use an explicit body for a "until not EINTR" loop. 2015-06-06 15:22:58 +00:00
christos
006ade20cc add missing options 2015-06-06 15:16:28 +00:00
joerg
6a61adcb14 The opposite of new[] is delete[], not delete. 2015-06-06 14:40:29 +00:00
jmcneill
c39a576f5e enable trng driver 2015-06-06 14:00:52 +00:00
jmcneill
1a286b4698 Add driver for AM335x TRNG module. 2015-06-06 14:00:32 +00:00
joerg
fc207b9190 Format-string related warnings work fine now with both GCC 4.8 and 
Clang.
 2015-06-06 13:48:37 +00:00
joerg
810e0f52bb Don't pass uninitialized variables by value. 2015-06-06 13:14:06 +00:00
joerg
d88f290a56 Drop assignment from uninitialized and otherwise unused variable. 2015-06-06 13:08:31 +00:00
msaitoh
72b7d58205 Cleanup. 2015-06-06 07:44:22 +00:00
matt
58e36827ad Add a KDASSERT to make sure interrupts are still enabled. 2015-06-06 04:43:41 +00:00
matt
f847872456 If mipsNN and kernel has DDB, trap on bogus IPL values passed to splraise. 2015-06-06 04:40:19 +00:00
msaitoh
762e3152b5 - Add workaround for I210 Errata 25 and I211 Errata 10. 
- Add wm_gmii_gs40g_{read|write}reg() and use it to access non-standatrd
     page.
   - Add wm_pll_workaround_i210() and call it when
       chip is i211
       chip is i210 and it use INVM
       chip is i210 and NVM image version < 3.25
- Add comment
- Rename macros.
 2015-06-06 04:39:12 +00:00