Rather, cast our single vector. We weren't reporting which vector
when panicking, and if somebody uses a vector that isn't
implemented it should be easy enough to trap down anyways.
- don't use managed mappings/backing objects for wired memory allocations.
save some resources like pv_entry. also fix (most of) PR/27030.
- simplify kernel memory management API.
- simplify pmap bootstrap of some ports.
- some related cleanups.
interrupt counter for a given shared interrupt descriptor.
- When an interrupt is successfully handled, reset the strays counter,
thus preventing a "slow leak" from eventually shutting off the interrupt
vector. Idea taken from pci_kn300.c (which was changed to use the new
alpha_shared_intr_reset_strays() function).
We can't write directly to a gdt slot, we need to go though
xen_update_descriptor().
From YAMAMOTO Takashi: this is not a problem in HEAD, because
as the kva for gdt is pageable, when gdt_put_slot1 attempts to modify gdt,
the fault handler allocates and maps a new page for you.
So the kernel doesn't panic, but could leak some memory.
on R5000/Rm52xx machines:
- Add a new global variable mips_cache_virtual_alias in mips/cache.c,
which indicates that VIPT cache on the CPU could cause virtual alias
and software support is required to handle it. (i.e. no VCED/VCEI)
- Add several cache flush/invalidate ops around KSEG0 access which
might cause virtual alias if mips_cache_virtual_alias is true.
(note checking mips_sdcache_line_size isn't valid for R5000/Rm52xx
because only R4000/R4400 with L2 cache have VCED/VCEI)
- Remove a global variable mips_sdcache_forceinv, which is now superseded
by new mips_cache_virtual_alias.
While here, also change some R4000/R4400 cache ops:
- Don't override mips_cache_alias_mask and mips_cache_prefer_mask with
values based on MIPS3_MAX_PCACHE_SIZE for R4000/R4400 with L2 cache
because it's still worth to reduce VCED/VCEI.
- Flush dcache in pmap_zero_page(9) unconditionally on all MIPS_HAS_R4K_MMU
CPUs and remove cache flush code from cpu_lwp_fork() in vm_machdep.c.
Thanks to Markus W Kilbinger for testing patches on port-cobalt/port-mips.
XXX This fix is just a workaround because it doesn't handle all possible
XXX virtual aliases. As discussed on port-mips, maybe the real fix
XXX for virtual alias is to change MI UVM to adapt it to VIPT cache.
XXX (all VA mappings against the same PA must have the same VAC index etc.)
* For sparc64 and amd64, define *SIZ32 VM constants.
* Add a new function pointer to struct emul, pointing at a function
that will return the default VM map address. The default function
is uvm_map_defaultaddr, which just uses the VM_DEFAULT_ADDRESS
macro. This gives emulations control over the default map address,
and allows things to be mapped at the right address (in 32bit range)
for COMPAT_NETBSD32.
* Add code to adjust the data and stack limits when a COMPAT_NETBSD32
or COMPAT_SVR4_32 binary is executed.
* Don't use USRSTACK in kern_resource.c, use p_vmspace->vm_minsaddr
instead (emulations might have set it differently)
* Since this changes struct emul, bump kernel version to 3.99.2
Tested on amd64, compile-tested on sparc64.
with options PCI_NETBSD_CONFIGURE.
Patch from KIYOHARA Takashi on port-cobalt.
This change makes siop(4) (and maybe all other PCI devices
using pci mem space) work on cobalt.
the interrupt latch (which is probably done by the hypervisor, linux/xen
doesn't do it either). Now the "fputest" configure test from pkgsrc/math/yorick
works as expected.
Thanks to Christian Limpach for the hint.
Original comments made several people misunderstand that the comment
says kernel's pagetable is at 0xa0004000. What the comment says is
about RedBoot's pagetable.
* Factor out struct selinfo and its header dependencies into its own header,
<sys/selinfo.h>, to avoid namespace pollution.
* Include <sys/selinfo.h> in user-visible headers where necessary.
I/O registers that are used in early start-up stage. Also stop using
special bootstrap-time-only bus_space_map function in {lubbock,g42xxeb}_machdep.c.
This makes initarm() for them a bit simpler, and gives us smaller diffs
to other evbarm platforms.
if the corresponding bit needs to be set in evtchn_pending_sel, and eventually
force an upcall (if we got a second event when this one what being handled).
For now to this by calling hypervisor_enable_irq(), this could be rewritten
in inline assembly by someone knowing enouth about i386 assembly :)
Check the passed in address as well as determining the maximum length
using VM_MAXUSER_ADDRESS in copyinstr and copyoutstr.
Problem originally fixed in OpenBSD/i386.
This fix suggested by Charles Hannum (mycroft at netbsd dot org).
I/O registers that are used in early start-up stage. This replaces the
special bootstrap-time-only bus_space_map function in smdk{2410,2800}_machdep.c.
This makes SMDK{2410,2800}'s initarm() a bit simpler, and gives us smaller diffs
to other evbarm platforms.
An another good thing for SMDK2800 is that now we have all built-in peripheral
registers mapped in 2 segments. We may expect less TLB miss on I/O access
(very slightly).
using VM_MAXUSER_ADDRESS in copyinstr and copyoutstr.
Problem originally fixed in OpenBSD/i386.
This fix suggested by Charles Hannum (mycroft at netbsd dot org).
