Don't assume we're on a uniprocessor system (the hypervisor may be running SMP)
and add "lock;" barrier to avoid instruction reordering in event handlings. This fix the last issue with event loss I was getting on SMP systems.
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57d0b7f835
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@ -1,4 +1,4 @@
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/* $NetBSD: hypervisor_machdep.c,v 1.5 2005/03/17 15:26:06 bouyer Exp $ */
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/* $NetBSD: hypervisor_machdep.c,v 1.6 2005/03/26 20:00:49 bouyer Exp $ */
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/*
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*
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@ -59,7 +59,7 @@
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: hypervisor_machdep.c,v 1.5 2005/03/17 15:26:06 bouyer Exp $");
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__KERNEL_RCSID(0, "$NetBSD: hypervisor_machdep.c,v 1.6 2005/03/26 20:00:49 bouyer Exp $");
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#include <sys/cdefs.h>
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#include <sys/param.h>
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@ -113,9 +113,7 @@ stipending()
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* STI at the end
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*/
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while (s->vcpu_data[0].evtchn_upcall_pending) {
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__insn_barrier();
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cli();
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__insn_barrier();
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s->vcpu_data[0].evtchn_upcall_pending = 0;
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/* NB. No need for a barrier here -- XCHG is a barrier
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* on x86. */
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@ -143,7 +141,6 @@ stipending()
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#endif
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}
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}
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__insn_barrier();
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sti();
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}
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@ -1,4 +1,4 @@
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/* $NetBSD: cpufunc.h,v 1.5 2005/03/09 22:39:20 bouyer Exp $ */
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/* $NetBSD: cpufunc.h,v 1.6 2005/03/26 20:00:49 bouyer Exp $ */
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/* NetBSD: cpufunc.h,v 1.28 2004/01/14 11:31:55 yamt Exp */
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/*-
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@ -294,7 +294,7 @@ breakpoint(void)
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#define write_psl(x) do { \
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__insn_barrier(); \
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HYPERVISOR_shared_info->vcpu_data[0].evtchn_upcall_mask = (x) ; \
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__insn_barrier(); \
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x86_lfence(); \
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if ((x) == 0 && HYPERVISOR_shared_info->vcpu_data[0].evtchn_upcall_pending) \
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hypervisor_force_callback(); \
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} while (0)
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@ -1,4 +1,4 @@
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/* $NetBSD: xen.h,v 1.10 2005/03/09 22:39:20 bouyer Exp $ */
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/* $NetBSD: xen.h,v 1.11 2005/03/26 20:00:49 bouyer Exp $ */
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/*
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*
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@ -129,7 +129,7 @@ do { \
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volatile shared_info_t *_shared = HYPERVISOR_shared_info; \
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__insn_barrier(); \
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if ((_shared->vcpu_data[0].evtchn_upcall_mask = (x)) == 0) { \
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__insn_barrier(); \
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x86_lfence(); \
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if (__predict_false(_shared->vcpu_data[0].evtchn_upcall_pending)) \
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hypervisor_force_callback(); \
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} \
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@ -138,7 +138,7 @@ do { \
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#define __cli() \
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do { \
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HYPERVISOR_shared_info->vcpu_data[0].evtchn_upcall_mask = 1; \
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__insn_barrier(); \
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x86_lfence(); \
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} while (0)
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#define __sti() \
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@ -146,7 +146,7 @@ do { \
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volatile shared_info_t *_shared = HYPERVISOR_shared_info; \
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__insn_barrier(); \
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_shared->vcpu_data[0].evtchn_upcall_mask = 0; \
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__insn_barrier(); /* unmask then check (avoid races) */ \
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x86_lfence(); /* unmask then check (avoid races) */ \
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if (__predict_false(_shared->vcpu_data[0].evtchn_upcall_pending)) \
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hypervisor_force_callback(); \
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} while (0)
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@ -161,18 +161,19 @@ do { \
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} while (/* CONSTCOND */ 0)
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#define save_and_sti(x) __save_and_sti(x)
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#ifdef MULTIPROCESSOR
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/*
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* always assume we're on multiprocessor. We don't know how many CPU the
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* underlying hardware has.
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*/
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#define __LOCK_PREFIX "lock; "
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#else
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#define __LOCK_PREFIX ""
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#endif
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static __inline__ uint32_t
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x86_atomic_xchg(volatile uint32_t *ptr, unsigned long val)
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{
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unsigned long result;
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__asm __volatile("xchgl %0,%1"
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__asm __volatile(__LOCK_PREFIX
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"xchgl %0,%1"
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:"=r" (result)
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:"m" (*ptr), "0" (val)
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:"memory");
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